SATEC SLC500 - Manual (Page 11)

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4.3.2 Data transfer from the BASIC module to the CPU
Table 4-4 explains the transfer algorithm in a form of the state machine.
Table 4-4 Data transfer through the CPU M1 file
CPU input
status CPU output
status SLC action BASIC module action Comment
A=0 B=0 No action A:=1 Request to send
A=1 B=0 B:=1 No action Clear to send
A=1 B=1 No action 1. Transfers data to
M1 file
2. A:=0
M1 file has been
updated
A=0 B=1 1. Copies M1 file
to data file
2. B:=0 No action
M1 file has been
processed
A=0 B=0 No action No action
The algorithm of the data transfer from the BASIC module to the CPU is as follows:
1. The BASIC module sets bit A to 1 requesting the access to the M1 file.
2. The CPU enables the access to the M1 file by setting bit B to 1.
3. The BASIC module transfers data to the M1 file.
4. The BASIC module resets bit A to 0 allowing the CPU to access the M1 file.
5. The CPU copies the M1 file to data file.
6. The CPU resets bit B to 0 enabling new requests.
4.3.3 Data transfer from the CPU to the BASIC module
Table 4-5 explains the transfer algorithm in a form of the state machine.
Table 4-5 Data transfer through the CPU M0 file
CPU input
status CPU output
status SLC action BASIC module action Comment
C=0 D=0 D:=1 No action Request to send
C=0 D=1 No action C:=1 Clear to send
C=1 D=1 1. Transfers data
to M0 file
2. D:=0 No action
M0 file has been
updated
C=1 D=0 No action 1. Copies M0 file
to data buffer
2. C:=0
M0 file has been
processed
C=0 D=0 No action No action
The algorithm of the data transfer from the CPU to the BASIC module is as follows:
1. The CPU sets bit D to 1 requesting the access to the M0 file.
2. The BASIC module enables the access to the M0 file by setting bit C to 1.
3. The CPU transfers data to the M0 file.
4. The CPU resets bit D to 0 allowing the BASIC module to access the M0 file.
5. The BASIC module copies the M0 file to data buffer.
6. The BASIC module resets bit C to 0 enabling new requests.