Connect Tech CTIM-00060 - Manual (Page 18)

Connect Tech Inc. | FreeForm/Express S6 - PCIe Spartan-6 FMC Carrier | User Manual
Revision 0.01 18
FPGA Design
In general, FPGA designs developed for the FreeForm/Express S6 can be based on IP generated with
Xilinx’s CORE Generator. The following table lists the CORE Generator IP proven to be compatible,
along with their current versions numbers.
Function IP Version Note
Memory MIG 3.6
Rocket I/O
Spartan-6 FPGA GTP
Transceiver Wizard
1.7
PCIe
Spartan-6 Integrated
Block for PCI Express
1.4
Ethernet Tri Mode Ethernet MAC 4.4
A valid license is required to use this IP, contact Xilinx
for details
For the latest reference designs developed by Connect Tech Inc., visit http://devel.connecttech.com