Calibre UK IC Communication Adapter ICA93LV - Manual (Page 24)

Revision 1.7 Page 23 of 27
09/12/1999
Appendix A I
2
C Communications Adapter Status Codes
This is an eight bit register, read using the getstatus routine. Each individual bit has its own meaning as
follows:
Bit 7 (MSB) - The PIN Bit
The PIN bit “Pending Interrupt Not” is a read-only flag which is used to synchronize serial communication.
Each time a serial data transmission is initiated (by sendaddress routine or setting STA bit) the PIN will be
set (= 1) automatically. After successful transmission of one byte (9 clock pulses, including acknowledge),
this bit will be automatically reset (= 0) indicating a complete transmission. When the ENI bit (enable
interrupt) is also set, the PIN triggers an external interrupt via the selected IRQ line when PIN is reset.
When in receiver mode, the PIN is also reset on completion of each received byte. In polled applications,
the PIN bit is tested (using the getstatus routine) to determine when a serial transmission has been
completed. In receiver mode, the PIN bit is tested (using the readbyte function). When the PIN becomes
set all other status bits will be reset, with the exception of the BB (not Bus Busy) bit.
In short, when transmitting data, if PIN = 0 then the data has been sent, if PIN = 1 then it has not. When
receiving data, if PIN = 0 then there is unread received data ready to read, if PIN = 1 then either the data
received has already been read, or no data has yet been received.
Bit 6 - Not Used
This bit is not currently used and will always = 0.
Bit 5 - The STS Bit
When in slave-receiver mode (i.e. transmission initiated by a master elsewhere on the I
2 C bus), the flag
STS = 1 when an externally generated Stop condition is detected, otherwise STS = 0. This flag is used
only in slave-receiver mode.
Bit 4 - The BER Bit
The BER (Bus Error) bit. BER = 1 when a misplaced Start or Stop has been detected, otherwise BER = 0.
This can be quite serious since the I
2 C devices on the bus may be left in an undefined state after a bus
error has occurred - in some circumstances the only way to get the bus going again may be to reset all
the I
2 C devices on it.
Bit 3 - The LRB/ADO Bit
The LRB (Last received Bit) / ADO (Address 0 “General Call” Address Received) bit. This dual function
status bit holds the value of the last received bit over the I
2 C bus when AAS (Bit 2) = 0. Normally this will
be the value of the slave acknowledge; thus checking for slave acknowledgement is done via testing of
the LRB bit. When AAS (Bit 2) = 1 (“Addressed As Slave”), the I
2 C Communications Adapter has been
addressed as a slave and the ADO bit will = 1 if the slave address received was the “General Call”
address. For further information on the “General Call” Address, see the Philips data books referenced in
Section 8 of this User Manual.
Bit 2 - The AAS Bit
The AAS (“Addressed As Slave”) bit. When acting as a slave-receiver, this flag is set = 1 when an
incoming address over the I
2 C bus matches the value defined by the setup routine, or if the slave address
received was the I2C bus “General Call” address (00 Hex). In all other circumstances, AAS = 0.
Bit 1 - The LAB Bit
The LAB (Lost Arbitration) bit. This bit is set = 1 when, in multimaster operation (more than one master
present on the I
2 C bus) arbitration is lost to another master on the I 2 C bus. In all other circumstances,
LAB = 0.
Bit 0 - The BB Bit
The BB (not Bus Busy) bit. This is a read-only flag indicating when the I
2 C bus is in use. BB = 0 indicates
that the bus is busy, and access is not possible (unless of course it is busy because the I 2 C
Communications Adapter itself has control of the bus). This bit is set = 1 by Stop conditions and reset = 0
by Start conditions. In short, BB = 1 means that the bus is free and a new transmission can be started.