Achronix Speedster22i sBus User Manual

Page 24

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24

UG047, October 24, 2013

parameter ST_SBUS_ADDR = 5'b00010;
parameter ST_SBUS_WR_DATA = 5'b00100;
parameter ST_SBUS_WR = 5'b01000;
parameter ST_SBUS_RD_DATA = 5'b10000;

/////////////////////////////////////////////////

always @(posedge i_clk or negedge i_rst_n)
begin
if (!i_rst_n)
begin
req_dly <= 1'b0;
req_dly2 <= 1'b0;
write_data <= {PBUS_DATA_WIDTH{1'b0}};
rw_address <= 'b0;
is_write <= 1'b0;
sbus_req_dly <= 1'b0;
end
else
begin
req_dly <= i_reg_rw_req;
req_dly2 <= req_dly;
sbus_req_dly <= sbus_req;
if (i_reg_rw_req && ~req_dly)
begin
is_write <= i_reg_write;
write_data <= i_reg_wr_data;
rw_address <= i_reg_address;
end
end
end

assign start_sbus_transfer = req_dly && ~req_dly2;
assign addr_req = {rw_address,is_write};

//////////////////////////////////////////////////////////////////////
// SBUS State Machine
//////////////////////////////////////////////////////////////////////
always @(posedge i_clk or negedge i_rst_n)
begin
if (!i_rst_n)
sbus_cs <= ST_SBUS_IDLE;
else if (i_sw_rst)
sbus_cs <= ST_SBUS_IDLE;
else
begin

case (sbus_cs)
ST_SBUS_IDLE : begin
if (start_sbus_transfer)
sbus_cs <= ST_SBUS_ADDR;
else
sbus_cs <= ST_SBUS_IDLE;

end
ST_SBUS_ADDR : begin
if (is_write && (address_cnt == 3'd7))
sbus_cs <= ST_SBUS_WR_DATA;
else if (address_cnt == 3'h7)
sbus_cs <= ST_SBUS_RD_DATA;
else
sbus_cs <= ST_SBUS_ADDR;
end
ST_SBUS_WR_DATA:begin
if (&rdwr_data_cnt)
sbus_cs <= ST_SBUS_WR;
else

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