Kontron CP3002-RA - Manual (Page 7)

CP3002-RC/CP3002-RA Preface
ID 1039-3625, Rev. 1.0 Page vii
P R E L I M I N A R Y
List of Tables
1-1 CP3002-RC/CP3002-RA Main Specifications ........................................... 1 - 8
1-2 Standards for the CP3002-RC ................................................................. 1 - 12
1-3 Standards for the CP3002-RA ................................................................. 1 - 13
1-4 Related Publications ................................................................................ 1 - 14
2-1 Features of the Processor Supported on the CP3002-RC/CP3002-RA .... 2 - 4
2-2 Debug LEDs’ Function ............................................................................... 2 - 7
2-3 POST Code Sequence .............................................................................. 2 - 8
2-4 POST Code Example ................................................................................ 2 - 8
2-5 CompactPCI Bus Connector J1 System Controller Slot Pinout ............... 2 - 13
2-6 Rear I/O CompactPCI Bus Connector J2 Pinout ..................................... 2 - 14
2-7 COMA and COMB Signal Description ..................................................... 2 - 15
2-8 Gigabit Ethernet Signal Description ......................................................... 2 - 16
2-9 Serial ATA Signal Description .................................................................. 2 - 17
2-10 USB Signal Description ........................................................................... 2 - 17
2-11 VGA Signal Description ........................................................................... 2 - 17
2-12 GPI/GPO Signal Description ................................................................... 2 - 18
2-13 Power Signal Description ........................................................................ 2 - 18
4-1 JP1 Jumper Setting for RS-422 RXD Termination (COMB) ...................... 4 - 3
4-2 JP2 Jumper Setting for RS-422 TXD Termination (COMB) ....................... 4 - 3
4-3 uEFI BIOS Boot Settings Jumper (JP3) .................................................... 4 - 3
4-4 uEFI BIOS Boot Configuration Jumper (JP4) ............................................ 4 - 3
4-5 I/O Address Map ........................................................................................ 4 - 4
4-6 Status Register 0 (STAT0) ......................................................................... 4 - 5
4-7 Status Register 1 (STAT1) ......................................................................... 4 - 6
4-8 Control Register 0 (CTRL0) ....................................................................... 4 - 7
4-9 Control Register 1 (CTRL1) ....................................................................... 4 - 7
4-10 Device Protection Register (DPROT) ........................................................ 4 - 8
4-11 Reset Status Register (RSTAT) ................................................................. 4 - 9
4-12 Board Interrupt Configuration Register (BICFG) ..................................... 4 - 10
4-13 Status Register 2 (STAT2) ....................................................................... 4 - 11
4-14 Board ID High Byte Register (BIDH) ....................................................... 4 - 11
4-15 Board and PLD Revision Register (BREV) .............................................. 4 - 11