Document Outline

• Revision History
• Imprint
• Disclaimer
• Table of Contents
• List of Tables
  • 1-1 System Relevant Information 1 - 5
  • 1-2 AM4100 Main Specifications 1 - 9
  • 1-3 Standards 1 - 12
  • 1-4 Related Publications 1 - 13
  • 2-1 Module Management LED Function 2 - 7
  • 2-2 User-Specific LED Function 2 - 8
  • 2-3 POST Code Example 2 - 9
  • 2-4 Debug Connector J5 Pinout 2 - 10
  • 2-5 Serial Con. J4 (SER0) Pinout 2 - 11
  • 2-6 Gigabit Ethernet Con. J2 / J3 Pinout Based on the Implementation 2 - 12
  • 2-7 Pinout of AMC Edge Connector J1 2 - 16
  • 2-8 Reserved Pins Description 2 - 20
  • 2-9 Extended Options Region Pins Description 2 - 20
  • 2-10 JTAG Pins Description 2 - 20
  • 2-11 Processor Supervision 2 - 22
  • 2-12 AMC-Specific Signals 2 - 22
  • 2-13 Onboard Power Supply Supervision 2 - 22
  • 2-14 Temperature Signals 2 - 23
  • 4-1 SW2 DIP Switch Functions 4 - 3
  • 4-2 POST Code or User-Specific LED Configuration 4 - 4
  • 4-3 NetBootLoader Firmware Flash Configuration 4 - 4
  • 4-4 Core 1 Low Memory Address Offset Mode 4 - 4
  • 4-5 SW3 DIP Switch Functions 4 - 5
  • 4-6 Interrupt Setting 4 - 6
  • 4-7 Chip Select Line Usage 4 - 6
  • 4-8 I/O Address Map 4 - 7
  • 4-9 Host CPU Register Map 4 - 8
  • 4-10 Memory Configuration Register 4 - 9
  • 4-11 Interface Configuration Register 4 - 10
  • 4-12 POST Code Register 4 - 11
  • 4-13 Firmware Configuration Register 4 - 11
  • 4-14 MMC I/O Status Register 4 - 12
  • 4-15 Watchdog Timer Control Register 4 - 14
  • 4-16 AMC Geographic Addressing Register 4 - 15
  • 4-17 Board and Logic Revision Register 4 - 15
  • 4-18 Host Reset Status / Command Register 4 - 16
  • 4-19 Host I/O Status Register 4 - 17
  • 4-20 Host I/O Configuration Register 4 - 17
  • 4-21 Board ID Register 4 - 17
  • 4-22 Hot Swap Status Register 4 - 18
  • 4-23 User-Specific LED Configuration Register 4 - 18
  • 4-24 User-Specific LED Control Register 4 - 20
  • 4-25 Serial-over-LAN Configuration Register 4 - 21
  • 4-26 Delay Timer Control and Status Register 4 - 22
  • 4-27 MMC Configuration Register 4 - 23
  • 5-1 NetBootLoader Control Commands 5 - 5
  • 5-2 System Status Monitoring Commands 5 - 6
  • 5-3 TFTP/FTP Server Commands 5 - 7
  • 5-4 NBL Flash Operation Commands 5 - 7
  • 5-5 Motorola S-Records Commands 5 - 8
  • 6-1 DC Operational Input Voltage Ranges 6 - 3
  • 6-2 Power Cons.: AM4100 MPC8641D, 1.0 GHz, 400 MHz Platform Freq. 6 - 5
  • 6-3 Power Cons.: AM4100 MPC8641D, 1.32 GHz, 528 MHz Platform Freq. 6 - 5
  • 6-4 Power Cons.: AM4100 MPC8641D, 1.5 GHz, 600 MHz Platform Freq. 6 - 5
  • 6-5 IPMI FRU Payload Power Consumption of the AM4100 6 - 5
  • 6-6 Payload Start-Up Current of the AM4100 6 - 5
  • 7-1 Pressure Drop vs. Airflow Data 7 - 8
  • 7-2 Deviation of the Airflow Rate on a Mid-Size AM4100 7 - 9
  • 7-3 Deviation of the Airflow Rate on a Full-Size AM4100 7 - 10
• List of Figures
  • 1-1 AM4100 Functional Block Diagram 1 - 6
  • 1-2 AM4100 Front Panel Versions 1 - 7
  • 1-3 AM4100 Board Layout (Top View) 1 - 8
  • 1-4 AM4100 Board Layout (Bottom View) 1 - 8
  • 2-1 Front Panel LEDs 2 - 6
  • 2-2 Serial Connector J4 (SER0) 2 - 11
  • 2-3 Gigabit Ethernet Connectors J2 / J3 2 - 12
  • 2-4 AM4100 Port Mapping 2 - 14
  • 4-1 SW2 DIP Switch 4 - 3
  • 4-2 SW3 DIP Switch 4 - 5
  • 7-1 Processor Temperature Sensor Placement (AM4100 Top View) 7 - 3
  • 7-2 Board Temperature Sensor Placement (AM4100 Bottom View) 7 - 3
  • 7-3 Operational Limits for the Mid-Size AM4100 with 1.0 GHz 7 - 6
  • 7-4 Operational Limits for the Mid-Size AM4100 with 1.32 GHz 7 - 7
  • 7-5 Operational Limits for the Full-Size AM4100 with 1.5 GHz 7 - 7
  • 7-6 Mid-Size and Full-Size AM4100 Impedance Curves 7 - 8
  • 7-7 Thermal Zones of the Mid-Size AM4100 Module 7 - 9
  • 7-8 Thermal Zones of the Full-Size AM4100 Module 7 - 10
• Proprietary Note
• Trademarks
• Environmental Protection Statement
• Explanation of Symbols
• For Your Safety
  • High Voltage Safety Instructions
  • Special Handling and Unpacking Instructions
  • General Instructions on Usage
• Two Year Warranty
• 1. Introduction
  • 1.1 Board Overview
  • 1.2 Board-Specific Information
  • 1.3 System Relevant Information
  • 1.4 Board Diagrams
    • 1.4.1 Functional Block Diagram
    • 1.4.2 Front Panel
    • 1.4.3 Board Layouts
  • 1.5 Technical Specification
  • 1.6 Kontron Software Support
  • 1.7 Standards
  • 1.8 Related Publications
• 2. Functional Description
  • 2.1 Processor and Memory
    • 2.1.1 Processor
    • 2.1.2 Memory
  • 2.2 Peripherals
    • 2.2.1 Timer
    • 2.2.2 Watchdog Timer
    • 2.2.3 Power Monitor and Reset Generation
    • 2.2.4 Flash Memory
  • 2.3 Board Interfaces
    • 2.3.1 Front Panel LEDs
    • 2.3.2 DIP Switches
    • 2.3.3 JTAG/Debug Interface
    • 2.3.4 Serial Ports
    • 2.3.5 Gigabit Ethernet Interfaces
  • 2.4 AMC Interconnection
    • 2.4.1 Fabric Interface
    • 2.4.2 Synchronization Clock Interface
    • 2.4.3 System Management Interface
    • 2.4.4 JTAG Interface
    • 2.4.5 Module Power Interface
    • 2.4.6 Pinout of AMC Card-edge Connector J1
  • 2.5 Module Management
    • 2.5.1 Module Management Controller
• 3. Installation
  • 3.1 Safety Requirements
  • 3.2 AM4100 Initial Installation Procedures
  • 3.3 Standard Removal Procedures
  • 3.4 AM4100 Hot Swap Procedures
    • 3.4.1 Hot Swap Extraction Procedures
    • 3.4.2 Hot Swap Insertion Procedures
      • 1. The BLUE HS LED turns on.
      • 2. Long blinks of the BLUE HS LED
      • 3. The BLUE HS LED turns off.
      • 4. Short blinks of the Module Management LEDs and the User-Specific LEDs
  • 3.5 Software Installation
• 4. Configuration
  • 4.1 Configuration of DIP Switches
    • 4.1.1 SW2 DIP Switch Configuration
    • 4.1.2 SW3 DIP Switch Configuration
  • 4.2 JTAG Chain Configuration
  • 4.3 Interrupts
  • 4.4 Local Chip Select Line Usage
  • 4.5 Memory Map
    • 4.5.1 Host CPU Register Map
  • 4.6 Host CPU Registers
    • 4.6.1 Memory Configuration Register
    • 4.6.2 Interface Configuration Register
    • 4.6.3 POST Code Register
    • 4.6.4 Firmware Configuration Register
    • 4.6.5 MMC I/O Status Register
    • 4.6.6 Watchdog Timer Control Register
    • 4.6.7 AMC Geographic Addressing Register
    • 4.6.8 Board and Logic Revision Register
    • 4.6.9 Host Reset Status / Command Register
    • 4.6.10 Host I/O Status Register
    • 4.6.11 Host I/O Configuration Register
    • 4.6.12 Board ID Register
    • 4.6.13 Hot Swap Status Register
    • 4.6.14 User-Specific LED Configuration Register
    • 4.6.15 User-Specific LED Control Register
    • 4.6.16 Serial-over-LAN Configuration Register
    • 4.6.17 Delay Timer Control and Status Register
    • 4.6.18 MMC Configuration Register
    • 4.6.19 IPMI Keyboard Controller Style Interface
• 5. NetBootLoader
  • 5.1 General Operation
  • 5.2 NetBootLoader Interfaces
    • 5.2.1 SER0 Serial Interface
    • 5.2.2 SER1 Serial Interface
    • 5.2.3 Ethernet Port Interfaces
  • 5.3 NetBootLoader Functions
    • 5.3.1 NetBootLoader Control
    • 5.3.2 System Status Monitoring
    • 5.3.3 Network Accessing
    • 5.3.4 NBL Flash Operation
    • 5.3.5 Motorola S-Records
  • 5.4 Operating the NetBootLoader
    • 5.4.1 Initial Setup
    • 5.4.2 Accessing the NetBootLoader
    • 5.4.3 NetBootLoader Configuration
    • 5.4.4 telnet Login
    • 5.4.5 NBL Flash Operations
    • 5.4.6 Updating the NetBootLoader
    • 5.4.7 Uploading an NBL Flash Memory Area
  • 5.5 Plug and Play
  • 5.6 Porting an Operating System to the CPU Board
  • 5.7 Commands
• 6. Power Considerations
  • 6.1 AM4100 Voltage Ranges
  • 6.2 Carrier Power Requirements
    • 6.2.1 Payload Power
    • 6.2.2 Payload and MMC Voltage Ramp
    • 6.2.3 Module Management Power Consumption
  • 6.3 Payload Power Consumption of the AM4100
  • 6.4 IPMI FRU Payload Power Consumption
  • 6.5 Payload Start-Up Current of the AM4100
• 7. Thermal Considerations
  • 7.1 Thermal Monitoring
    • 7.1.1 Placement of the Temperature Sensors
    • 7.1.2 Board Thermal Monitoring
    • 7.1.3 Processor Thermal Monitoring
  • 7.2 CPU Internal Thermal Regulation
  • 7.3 External Thermal Regulation
    • 7.3.1 Forced Airflow
    • 7.3.2 Thermal Characteristic Graphs
    • 7.3.3 Airflow Impedance
    • 7.3.4 Airflow Paths