Cypress Quad HOTLink II CYV15G0404RB - Manual (Page 2)

CYV15G0404RB
Document #: 38-02102 Rev. *C Page 2 of 27
Figure 1. HOTLink II™ System Connections
V
ide
o C
o
p
ro
c
es
s
o
r
10
10
10
10
V
ideo
C
opro
c
essor
10
10
10
10
Serial Links
Independent
CYV15G0403TB
Independent
Reclocking Deserializer Serializer
Channel
CYV15G0404RB
Channel
Reclocked
Outputs
Reclocked
Outputs
CYV15G0404RB Deserializing Reclocker Logic Block Diagram
x10
Deserializer
Reclocker RX
RXDA[9:0]
R
O
UT
A1±
ROUT
A
2
±
INA1± INA
2
±
TRGCLKA±
x10
Deserializer
Reclocker RX
RXDB[9:0]
R
O
UTB1±
ROUTB
2
±
INB1± INB
2
±
TRGCLKB±
x10
Deserializer
Reclocker RX
RXDC[9:0]
R
O
UTC1
±
ROUTC
2
±
INC1
±
INC
2
±
TRGCLKC±
x10
Deserializer
Reclocker RX
RXDD[9:0]
R
O
UTD1
±
ROUTD
2
±
IND1
±
IND
2
±
TRGCLKD±
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