Cypress Perform nvSRAM - Manual (Page 13)

PRELIMINARY
CY14B102L, CY14B102N
Document #: 001-45754 Rev. *B Page 13 of 24
Software Controlled STORE/RECALL Cycle
In the following table, the software controlled STORE/RECALL cycle parameters are listed.
[26, 27]
Parameters Description
20 ns 25 ns 45 ns
Unit
Min Max Min Max Min Max
t
RC
STORE/RECALL Initiation Cycle Time 20 25 45 ns
t
SA
Address Setup Time 0 0 0 ns
t
CW
Clock Pulse Width 15 20 30 ns
t
HA
Address Hold Time 0 0 0 ns
t
RECALL
RECALL Duration 200 200 200 μs
Switching Waveforms
Figure 12. CE and OE Controlled Software STORE/RECALL Cycle [27]
Figure 13. Autostore Enable/Disable Cycle
W
5&
W
5&
W
6$
W
&:
W
&:
W
6$
W
+$
W
/=&(
W
+=&(
W
+$
W
+$
W
+$
W
'(/$<
W
6725(
W
5(&$//
W
+++'
W
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+LJK,PSHGDQFH
$GGUHVV $GGUHVV $GGUHVV
&(
2(
+6% 6725(RQO\
'4 '$7$
5:,
W
5&
W
5&
W
6$
W
&:
W
&:
W
6$
W
+$
W
/=&(
W
+=&(
W
+$
W
+$
W
+$
W
'(/$<
$GGUHVV $GGUHVV $GGUHVV
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'4 '$7$
5:,
W
66
Notes
26. The software sequence is clocked with CE controlled or OE controlled reads.
27. The six consecutive addresses must be read in the order listed in
Table 1 on page 5. WE must be HIGH during all six consecutive cycles.
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