Artesyn COMX-P2020 Installation and Use (February 2015) - Manual (Page 56)

Controls, LEDs, and Connectors
COMX-P2020 Module Installation and Use (6806800K97E) 56
1100 SRIO2 (1x) on SerDes lane 0 (2.5Gbps)
SRIO1 (1x) on SerDes lane 1 (2.5Gbps)
SGMII eTSEC2 (x1) on SerDes lane 2
SGMII eTSEC3(x1) on SerDes lane 3
1101 PCI Express 1 (x1) on SerDes lane 0
SRIO1 (1x) on SerDes lane 1
SGMII eTSEC2 (x1) on SerDes lane 2
SGMII eTSEC3(x1) on SerDes lane 3
1110 PCI Express 1 (x1) on SerDes lane 0;
PCI Express 2 (x1) on SerDes lane 1;
SGMII eTSEC2 (x1) on SerDes lane 2;
SGMII eTSEC3 (x1) on SerDes lane 3.
1111 PCI Express 1 (x2) on SerDes lanes 0-1;
SGMII eTSEC2 (x1) on SerDes lane 2;
SGMII eTSEC3 (x1) on SerDes lane 3.
Signal name LA27, LA16
Function CPU Boot Configuration
(cfg_cpu0_boot, cfg_cpu1_boot)
Select Option PU / PD Resistors
Default value 11