Artesyn COMX-P40x0 ENP2 Installation and Use (August 2014) User Manual
Comx-p40x0 enp2
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Table of contents
Document Outline
- COMX-P40x0 ENP2
- Contents
- About this Manual
- Introduction
- Hardware Preparation and Installation
- Controls, LEDs, and Connectors
- Functional Description
- 4.1 Overview
- 4.2 Block Diagram
- 4.3 Processor Core and Cache Memory Complex
- 4.4 Integrated Memory Controller
- 4.5 Local Bus
- 4.6 SERDES Block
- 4.7 Thermal Management
- 4.8 Main Memory
- 4.9 GPIO
- 4.10 SDHC
- 4.11 SPI Interface
- 4.12 LAN
- 4.13 PHY
- 4.14 UART Interface
- 4.15 Real Time Clock
- 4.16 Watchdog Timer
- 4.17 USB
- 4.18 I2C Interface
- Clock Structure
- Power Domains
- BSP
- 7.1 Overview
- 7.2 Setup Requirements
- 7.3 Basic Commands
- 7.4 BSP Build Requirements
- 7.5 BSP Source Code Package
- 7.6 Basic Environment Variable Settings
- 7.6.1 Setup Build Environment
- 7.6.2 Network Variables
- 7.6.3 Filename Variables for BSP Components
- 7.6.4 Address Variables for BSP Components on NOR Flash
- 7.6.5 Address Variables for the Boot Components in RAM
- 7.6.6 Device Variables
- 7.6.7 HWCONFIG Variable
- 7.6.8 Bootargs Variable
- 7.6.9 Bootup Variables
- 7.7 Checking the BSP Version
- 7.8 CPU
- 7.9 Address Space
- 7.10 DDR3 SDRAM
- 7.11 GPIO
- 7.12 UART
- 7.13 NOR Flash
- 7.14 NAND Flash
- 7.15 I2C
- 7.16 SPI
- 7.17 MMC/SDHC
- 7.18 USB
- 7.19 SerDes
- 7.20 Network
- 7.21 Build BSP Images
- 7.22 Deploy BSP Images
- 7.23 Boot
- A Related Documentation
- Safety Notes