IBASE MI952 - Manual (Page 31)

BIOS SETUP
MI952 User’s Manual 27
Advanced Chipset Features
This Setup menu controls the configuration of the chipset.
Phoenix - AwardBIOS CMOS Setup Utility
Advanced Chipset Features
PCIE Configuration Press Enter ITEM HELP
IGX Configuration Press Enter
Init Display First IGX
NB Power Management Auto
Memory Hole Disabled
System BIOS Cacheable Disabled
Phoenix - AwardBIOS CMOS Setup Utility
IGX Configuration
Internal Graphic Mode UMA ITEM HELP
UMA Frame Buffer Size Auto
IGX Engine Clock Override Disable
IGX Engine Clock 500
NB Azalia Enable
Video Display DFP1+DFP2
PCIE Configuration
The fields under PCIE Configuration features settings for Primary Dual
Slot Config, GPP Slots Power Limit, GFX ports, GPPs and NB-SB port
features.
Internal Graphics Mode
There are two different setting selections for MI952 and MI952F. The
settings for MI952 are Disabled and UMA; while the MI952F has
additional settings of Sideport and UMA+sideport.
Init Display First
The default setting is IGX.
NB Power Management
The default setting is Auto.
Memory Hole At 15M-16M
In order to improve performance, certain space in memory can be
reserved for ISA cards. This memory must be mapped into the memory
space below 16 MB. The choices are Enabled and Disabled.
System BIOS Cacheable
The setting of Enabled allows caching of the system BIOS ROM at
F000h-FFFFFh, resulting in better system performance. However, if
any program writes to this memory area, a system error may result.