Sundance SMT399-160 - Manual (Page 26)

DDS0 Register – 0xB – Frequency Tuning Word 0
Setting Frequency
Tuning
Word 0
Description
The frequency tuning word is a 32-bit register that controls the rate of accumulation in the phase
accumulator of the DDS core.
5.4.13 DDS0 Register – 0xC – Frequency Tuning Word 0.
For more details, refer to AD9954 datasheet.
DDS0 Register – 0xC – Frequency Tuning Word 0
Byte Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
0 Frequency Tuning Word 0[23:16]
Default ‘00000000’
1 Frequency Tuning Word 0[31:24]
Default ‘00000000’
DDS0 Register – 0xC – Frequency Tuning Word 0
Setting Frequency
Tuning
Word
Description
The frequency tuning word is a 32-bit register that controls the rate of accumulation in the phase
accumulator of the DDS core.
5.4.14 DDS0 Register – 0xD – Phase Offset Word.
For more details, refer to AD9954 datasheet.
DDS0 Register – 0xD –Phase Offset Word
Byte Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
0 Phase Offset Word[7:0]
Default ‘00000000’
1 Not Used Phase Offset Word[13:8]
Default ‘00’ ‘000000’
DDS0 Register – 0xD – Phase Offset Word
Setting Phase
Offset
Word
Description
The phase offset word is a 14-bit register that stores a phase offset value.
5.4.15 DDS0 Register – 0xE – Frequency Tuning Word 1.
For more details, refer to AD9954 datasheet.
DDS0 Register – 0xE – Frequency Tuning Word 1
Byte Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
0 Frequency Tuning Word 1[7:0]
Default ‘00000000’
User Manual SMT399-160 Page 26 of 39 Last Edited: 24/05/2007 17:12:00