Document Outline

• ACE User Guide
  • Achronix Semiconductor Corporation
• Table of Contents
• Preface
  • About This Guide
  • Related Documents
  • Conventions Used in this Guide
• Getting Started
  • Introduction
  • ACE Quickstart Tutorial
• Concepts
  • Workbench
  • Perspectives
  • Editors
    • Text Editor
    • HTML Report Browser
    • Advanced PLL Configuration Editor
    • Basic PLL Configuration Editor
    • BRAM Configuration Editor
    • DDR3 Configuration Editor
    • Ethernet Configuration Editor
    • FIFO Configuration Editor
    • Interlaken Configuration Editor
    • LRAM Configuration Editor
    • LRAM FIFO Configuration Editor
    • PCI Express Configuration Editor
    • ROM Configuration Editor
    • SerDes Configuration Editor
    • VCD Waveform Editor
  • Views
    • Fast views
    • Projects View
    • Flow View
    • Options View
    • Multiprocess View
    • Tcl Console View
    • Search View
    • Selection View
    • Critical Paths View
    • Critical Path Diagram View
    • Package View
    • IO Assignment View
    • Clock Regions View
    • Netlist Browser View
    • Placement Regions View
    • Outline View
    • IP Libraries View
    • IP Diagram View
    • IP Problems View
    • Download View
  • Dialogs
    • Create Project Dialog
    • Load Project Dialog
    • Create Implementation Dialog
    • Restore Implementation Dialog
    • Save Implementation Dialog
    • Create a New Constraints File Dialog
    • Create a New Text File Dialog
    • Add Source Files Dialog
    • Save Placement Dialog
    • Save Script File Dialog
    • New IP Configuration Dialog
    • Generate IP Design Files Dialog
    • Configure Selected IOs Dialog
    • Save Changed Properties Dialog
    • Generate a Pin Assignment Report Dialog
    • Configure Table Columns Dialog
    • Add Signals to Waveform Viewer Dialog
    • Assign Bussed Signal Names Dialog
    • Search Filter Builder Dialog
    • Create Placement Region Dialog
    • Save Placement Regions Dialog
  • Toolbars
  • Preferences
    • Critical Path Diagram View Preference Page
    • Floorplanner View Colors Preference Page
    • Floorplanner View Optimizations Preference Page
    • IP Diagram Preference Page
    • Multiprocess View Preference Page
    • Other Colors and Fonts Preference Page
    • Package View Preference Page
    • Placement Regions Preference Page
    • Project Management Preference Page
    • Tcl Console View Preference Page
    • Text Editors Preference Page
  • Projects
    • Implementations
    • Project File
    • Source Files
    • IP Configurations
    • Output Files
    • Log Files
    • Active Project and Implementation
  • Flow
    • Flow Steps
    • Flow Status
  • Reports
    • Clock Report
    • Utilization Report
    • Pin Assignment Report
    • Timing Report
    • I/O Timing Report
    • Routing Report
    • Power Dissipation Report
    • Multiprocess Summary Report
  • Advanced Concepts
    • Clock Regions
• Tasks
  • Running ACE
  • Working With Perspectives
    • Switching Between Perspectives
    • Opening Perspectives
    • Resetting Perspectives
  • Working with Views and Editors
    • Opening Views
    • Moving and Docking Views
    • Rearranging Tabbed Views
    • Creating Fast Views
    • Tiling Editors
    • Maximizing a View or Editor
  • Working with Projects and Implementations
    • Creating Projects
    • Loading Projects
    • Removing Projects
    • Saving Projects
    • Opening Project Files in an Editor
    • Adding Source Files
    • Removing Source Files
    • Opening Source Files in an Editor
    • Creating Implementations
    • Saving Implementations
    • Restoring Implementations
    • Copying Implementations
    • Setting the Active Implementation
    • Removing Implementations
    • Configuring Implementation Options
    • Opening Output Files in an Editor
    • Opening Report Files in an Editor
  • Running the Flow
    • Running the Entire Flow
    • Running a Sub-Flow
    • Prepare Steps
    • Place and Route Steps
    • Design Completion Steps
    • FPGA Programming Steps
    • Running Multiple Flows in Parallel
  • Using the Tcl Console
    • Sending Commands from GUI Actions
    • Sending Commands from the Console
    • Command Highlighting
    • Command Auto-Completion
    • Command Help
    • Text Limit
    • Clearing the Console
    • Viewing the ACE Log File
    • Object Type Prefixes
  • Creating an IP Configuration
    • Creating and Naming an IP Configuration
    • Setting the IP Configuration
    • Generating the IP Design Files
    • Adding Configuration Files to a Project
  • Viewing the Floorplanner
    • Opening and Closing the Fly-Out Palette
    • Zooming In and Out
    • Panning
    • Selecting Objects
    • Deselecting Objects
    • Toggling Mouse Tools
    • Filtering the View
    • Getting Object Tooltips
    • Viewing Object Labels
  • Viewing the Package Layout
    • Opening and Closing the Fly-Out Palette
    • Zooming In and Out
    • Panning
    • Selecting Objects
    • Deselecting Objects
    • Toggling Mouse Tools
    • Filtering the View
    • Getting Object Tooltips
    • Viewing Object Labels
  • Pre-Placing a Design
    • Placing an Object
    • Changing Between Fixed and Soft Placement
    • Removing Placement
    • Saving Pre-Placement Constraints
    • Using Pre-Placement in the Flow
  • Analyzing Critical Paths
    • Generating Timing Reports
    • Highlighting Critical Paths
    • Selecting Critical Path Objects
    • Zooming to Critical Paths
    • Printing Critical Path Details
    • Using Critical Path Diagrams
    • Viewing Critical Paths in the Schematic Viewer
  • Managing I/Os
  • Running the SnapShot Debugger
    • General SnapShot Description and Architecture
    • Using the SnapShot Macro
    • Setting Up the Bitporter Pod Connection
    • Setting Up the Scan Chain
    • Entering a Trigger Pattern
    • Configuring Test Stimulus
    • Setting Triggering Range
    • Configuring the Samples
    • Collecting Samples
    • Saving/Loading SnapShot Configurations
    • Batch Mode
  • Playing a STAPL File
    • Selecting a STAPL File
    • Selecting Actions and Procedures to be Played
    • Specifying the Bitporter Pod
    • Playing an Action
  • Optimizing a Design
    • Attempting Likely Optimizations Using Option Sets
  • Placement Regions and Placement Region Constraints
    • Placement Region Preferences
    • Creating a new placement region
    • Resizing an existing placement region
    • Moving an existing placement region
    • Assigning placement region constraints
    • Listing all objects constrained to a placement region
    • Removing a placement region constraint from an object
    • Saving placement region definitions and placement region constraints
    • Deleting Placement Regions
• Tcl Command Reference
  • add_project_constraints
  • add_project_ip
  • add_project_netlist
  • add_region_insts
  • all_clocks
  • all_inputs
  • all_outputs
  • apply_extra_pipeline
  • apply_placement
  • clear_arcs
  • clear_drawing
  • clear_lines
  • clear_ovals
  • clear_polygons
  • clear_rectangles
  • clear_strings
  • clock_info
  • clock_relation
  • create_clock
  • create_flow_step
  • create_generated_clock
  • create_impl
  • create_path
  • create_project
  • create_region
  • deselect
  • disable_flow_step
  • disable_project_constraints
  • display_file
  • display_rtl
  • draw_arc
  • draw_line
  • draw_oval
  • draw_polygon
  • draw_rectangle
  • draw_string
  • enable_flow_step
  • enable_project_constraints
  • find
  • generate_ip_design_files
  • get_ace_cputime
  • get_ace_current_memory_usage
  • get_ace_peak_memory_usage
  • get_ace_version
  • get_active_impl
  • get_active_project
  • get_cells
  • get_clocks
  • get_current_design
  • get_current_partname
  • get_efd_file_path
  • get_enabled_constraints
  • get_extra_pipeline
  • get_fabricdb_path
  • get_impl_names
  • get_impl_option
  • get_installation_directory
  • get_location
  • get_nets
  • get_part_names
  • get_path_property
  • get_pins
  • get_placement
  • get_pod_names
  • get_ports
  • get_project_constraint_files
  • get_project_directory
  • get_project_ip_files
  • get_project_names
  • get_project_netlist_files
  • get_properties
  • get_property
  • get_region_insts
  • get_selection
  • get_stapl_actions
  • get_techlib_name
  • get_techlib_path
  • get_techlibdb_path
  • get_techlibt_name
  • get_techlibt_path
  • get_techlibx_name
  • get_techlibx_path
  • highlight
  • ignore_cancel
  • load_place_and_route
    • Usage Notes:
  • load_project
  • message
  • prepare_sta
  • refresh_drawing
  • remove_flow_step
  • remove_impl
  • remove_path
  • remove_project
  • remove_project_constraints
  • remove_project_ip
  • remove_project_netlist
  • remove_region
  • remove_region_insts
  • rename_impl
  • report_clock
  • report_clocks
  • report_impl_options
  • report_pins
  • report_placement
  • report_power
  • report_regions
  • report_routing
  • report_utilization
  • reset_impl_option
  • reset_sta
  • restore_impl
    • Usage Notes:
  • restore_project
  • run
  • run_fanout_control
  • run_final_drc_checks
  • run_fpga_download
  • run_gate_balance
  • run_generate_bitstream
  • run_generate_netlist
  • run_insert_reset
  • run_place
  • run_post_process
  • run_prepare
  • run_remove_reset
  • run_route
  • run_stapl_action
  • run_timing_analysis
  • run_un_post_process
  • run_unplace
  • run_unroute
  • save_place_and_route
    • Usage Notes:
  • save_placement
  • save_impl
    • Usage Notes:
  • save_project
  • save_properties
  • save_regions
  • select
  • set_active_impl
  • set_clock_groups
  • set_clock_type
  • set_cluster
  • set_default_relation
  • set_extra_delay
  • set_extra_pipeline
  • set_false_path
  • set_flyline_direction
  • set_impl_option
  • set_input_delay
  • set_input_transition
  • set_load
  • set_max_flyline_fanout
  • set_output_delay
  • set_placement
  • set_property
  • set_region_bounds
  • set_units
  • timing_summary
  • write_bitstream
  • write_critical_paths_script
  • write_netlist
  • write_tcl_history
• Revision History
  • Version 5.0.0:
    • Version 4.2.0:
    • Version 3.2.0: