FUJITSU MHV2120AT - Manual (Page 269)

C141-E218 IN-1
Index
1 drive connection ..................................... 2-3
2 drives configuration................................ 2-4
2 drives connection.................................... 2-4
8MB buffer .............................................. 6-12
A
A/D converter circuit............................... 4-11
AAM........................................................ 5-92
acceleration mode.................................... 4-19
acoustic noise ............................................ 1-9
acoustic noise specification ....................... 1-9
active idle mode......................................... 6-7
active mode................................................ 6-7
actuator ...............................................2-2, 4-2
actuator motor control ............................. 4-18
adaptability ................................................ 1-2
advanced power management................. 1-12,
1-13, 5-91
AGC circuit ............................................. 4-10
air circulation system................................. 2-2
air filter ...................................................... 4-3
alternate status register ............................ 5-13
alternating processing
for defective sector............................... 6-10
ambient temperature .................................. 3-6
APM ...............................................1-12, 5-91
ATA interface............................................ 2-3
attribute ID .............................................. 5-47
attribute value for the worst case so
far......................................................... 5-48
automatic acoustic management.............. 5-92
automatic alternating processing ............. 6-11
average positioning time............................ 1-2
B
blower........................................................ 4-3
burst even1 .............................................. 4-17
burst even2 .............................................. 4-17
burst odd .................................................. 4-17
C
cable connection ...............................3-9, 3-10
cable connector specification .................. 3-10
cache operation........................................ 6-19
caching function when power supply
is turned on. ......................................... 6-20
caching operation.....................................6-13
CHECK POWER MODE ................ 5-39, 6-9
CHECK POWER MODE command .........6-8
check sum ............................. 5-51, 5-54, 5-55
circuit configuration........................... 4-3, 4-5
command block register.............................5-8
command code and parameter ...... 5-14, 5-15,
5-16, 5-127, 5-128
command data structure ...........................5-54
command description...............................5-18
command processing during self-
calibration...............................................4-8
command protocol .................................5-129
command register.....................................5-13
command that are targets of caching .......6-19
command without data transfer..............5-134
command, target of caching.....................6-13
compact......................................................1-2
compensating open loop gain.....................4-7
connection to ATA interface......................1-3
contents of security password ................5-101
contents of SECURITY SET
PASSWORD data ................................5-93
control block register ...............................5-13
controller circuit................................. 2-3, 4-4
CSEL setting ............................................3-13
current and power dissipation ....................1-7
current attribute value ..............................5-48
current fluctuation (Typ.) at +5 V
when power is turned on ........................1-8
current LBA under test ............................5-56
current requirements and power
dissipation ..............................................1-7
current span under test .............................5-56
cylinder high register ...............................5-10
cylinder low register ................................5-10
D
D/A converter (DAC) ..............................4-13
data area ...................................................4-15
data assurance in the event of power
failure ...................................................1-10
data buffer ..................................................1-3
DATA buffer structure.............................6-12
data format of SMART
comprehensive error log.......................5-54