Fairchild SEMICONDUCTOR RC5040 User Manual
Page 3
APPLICATION NOTE
AN42
3
RC5040 and RC5042 Description
Simple Step-Down Converter
Figure 1. Simple Buck DC-DC Converter
Figure 1 illustrates a step-down DC-DC converter with no
feedback control. The basic step-down converter serves as
the basis for deriving the design equations for the RC5040
and RC5042. From Figure 1, the basic operation begins by
closing the switch S1, so that the input voltage V
IN
is
impressed across inductor L1. The current flowing through
this inductor is given by the following equation:
where T
ON
is the duty cycle (the time when S1 is closed).
When S1 opens, the diode D1 conducts the inductor
current and the output current is delivered to the load accord-
ing to the following equation:
where T
S
is the overall switching period and (T
S
– T
ON
) is
the time during which S1 is open.
By solving these equations you can obtain the basic relation-
ship for the output voltage of a step-down converter:
In order to obtain a more accurate approximation for V
OUT
,
we must also include the forward voltage V
D
across diode
D1 and the switching loss, V
SW
. After taking into account
these factors, the new relationship becomes:
Where V
SW
= I
L
• R
DS,ON
.
The RC5040 and RC5042 Controllers
The RC5040 is a programmable synchronous-mode DC-DC
converter controller. The RC5042 is a non-synchronous ver-
sion of the RC5040. When designed with the appropriate
external components, either device can be configured to
deliver more than 14.5A of output current. During heavy
loading conditions, these controllers function as current-
mode PWM step-down regulators. Under light loads, they
function in PFM (pulse frequency modulation) or pulse skip-
ping mode. The controllers sense the load level and switch
between the two operating modes automatically, thus opti-
mizing efficiency under all loads. The key differences
between the RC5040 and RC5042 are listed in Table 4.
Table 4. RC5040 and RC5042 Differences
Refer to the RC5040 Block Diagram illustrated in Figure 2.
The control loop of the regulator contains two main sections:
the analog control block and the digital control block. The
analog block consists of signal conditioning amplifiers feed-
ing into a set of comparators which provide the inputs to the
digital block. The signal conditioning section accepts inputs
from the IFB (current feedback) and VFB (voltage feedback)
pins and sets two controlling signal paths. The voltage con-
trol path amplifies the VFB signal and presents the output to
one of the summing amplifier inputs. The current control
path takes the difference between the IFB and VFB and pre-
sents the result to another input of the summing amplifier.
These two signals are then summed together with the slope
compensation input from the oscillator. This output is then
presented to a comparator, which provides the main PWM
control signal to the digital control block.
The additional comparators in the analog control section sets
the threshold for when the RC5040 enters PFM mode during
light loads and the point when the current limit comparator
disables the output drive signals to the MOSFETs.
The digital control block is designed to take the comparator
inputs along with the main clock signal from the oscillator
and provide the appropriate pulses to the HIDRV and
LODRV pins that control the external power MOSFETs. The
digital section was designed utilizing high speed Schottky
transistor logic, thus allowing the RC5040 to operate at clock
speeds as high as 1MHz.
C1
R
L
Vout
+
–
D1
V
IN
65-AP42-01
L1
S1
I
L
V
IN
V
OUT
–
(
)
T
ON
L1
-----------------------------------------------
=
I
L
V
OUT
T
S
T
ON
–
(
)
L1
--------------------------------------------
=
V
OUT
V
IN
T
ON
T
S
-----------
=
V
OUT
V
IN
V
D
V
SW
–
+
(
)
T
ON
T
S
-----------
V
D
–
=
RC5040
RC5042
Operation
Synchronous
Non-Synchronous
Package
20-pin SOIC
16-pin SOIC
Output Enable/
Disable
Yes
No