Mosfet gate bias – Fairchild SEMICONDUCTOR RC5040 User Manual

Page 8

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AN42

APPLICATION NOTE

8

MOSFET Gate Bias

The MOSFET(s) can be biased using one of two methods:
Charge Pump or 12V Gate Bias.

Charge Pump (or Bootstrap)

Figure 6 employs a charge pump to provide the MOSFET
gate bias. The charge pump capacitor, CP, is used as a flying
capacitor to boost the voltage of the RC5040 or RC5042 out-
put driver. When the MOSFET switches off, the source of the
MOSFET is at -0.6V. VCCQP is charged through the Schot-
tky diode to 4.5V. Thus, the capacitor CP is charged to 5V.
When the MOSFET turns on, the source of the MOSFET is
at approximately 5V. The capacitor voltage follows, and
hence provides a voltage at VCCQP equal to 10V. The Schot-
tky is required to provide the charge path when the MOSFET
is off, and then reverses bias when the VCCQP goes to 10V.
The capacitor CP needs to be a high Q and high frequency
capacitor. A 1

µ

F ceramic capacitor is recommended here.

Figure 6. Charge Pump Configuration

12V Gate Bias

Figure 7 illustrates how an external 12V source can be used
to bias VCCQP. A 47

resistor is used to limit the transient

current into the VCCQP pin, and a 1

µ

F capacitor filter is

used to filter the VCCQP supply. This method provides a
higher gate bias voltage (V

GS

) to the MOSFET, and there-

fore reduces the R

DS,ON

and resulting power loss within the

MOSFET. Figure 8 illustrates how R

DS,ON

decreases dra-

matically as V

GS

increases. A 6.2V Zener (DS2) is used to

clamp the voltage at V

CCQP

to a maximum of 12V and

ensure that the absolute maximum voltage of the IC is not
exceeded.

Warning: The 12V Gate Bias method applies only to the
RC5042. The RC5040 has not been designed to accept an
external 12V gate bias voltage, and may be damaged if
this method is used.

Figure 7. 12V Gate Bias Configuration

PWM/PFM

Control

65-AP42-06

+5V

L1

VCCQP

HIDRV

M1

CP

RS

DS1

DS2

CB

VO

PWM/PFM

Control

65-AP42-07

+5V

L1

VCCQP

HIDRV

M1

RS

DS1

D1
6.2V

CB

VO

+12V

47

Figure 8. R

DS,ON

vs. V

GS

for Selected MOSFETs

0

0.01

0.02

0.03

0.04

0.05

0.06

0.07

0.08

0.09

0.1

1.5

2

2.5

3

3.5

4

5

6

7

8

9

10

11

Gate-Source Voltage, V

GS

(V)

R

DS,ON

(

)

R(DS)Fuji

R(DS)Fuji

R(DS)706A

R(DS)-706AEL

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