FUJITSU MB91401 - Manual (Page 38)

MB91401
38
(Continued)
*1 : An initial value is a different register at the reset level. The display is the one at the INIT level.
*2 : An initial value is a different register at the reset level. The display is due to the INIT level by INITX.
*3 : An initial value is set by the WTH bit of the mode vector.
Address
Register
Block
++++
0
++++
1
++++
2
++++
3
0000_067C
H

Memory IF
0000_0680
H
CSER [R/W]
00000001
CHER [R/W]
XXXXXXX1

TCR [R/W]
00000000* 1
0000_0684
H
RCR
00XXXXXX 00XXXXXX

0000_0688
H
to
0000_0FFC
H

Reserved
Address
Register
Block
++++
0
++++
1
++++
2
++++
3
0000_1000
H
DMASA0
XXXXXXXX XXXXXXXX
[R/W]
XXXXXXXX XXXXXXXX
DMAC
0000_1004
H
DMADA0
XXXXXXXX XXXXXXXX
[R/W]
XXXXXXXX XXXXXXXX
0000_1008
H
DMASA1
XXXXXXXX XXXXXXXX
[R/W]
XXXXXXXX XXXXXXXX
0000_100C
H
DMADA1
XXXXXXXX XXXXXXXX
[R/W]
XXXXXXXX XXXXXXXX
0000_1010
H
DMASA2
XXXXXXXX XXXXXXXX
[R/W]
XXXXXXXX XXXXXXXX
0000_1014
H
DMADA2
XXXXXXXX XXXXXXXX
[R/W]
XXXXXXXX XXXXXXXX
0000_1018
H
DMASA3
XXXXXXXX XXXXXXXX
[R/W]
XXXXXXXX XXXXXXXX
0000_101C
H
DMADA3
XXXXXXXX XXXXXXXX
[R/W]
XXXXXXXX XXXXXXXX
0000_1020
H
DMASA4
XXXXXXXX XXXXXXXX
[R/W]
XXXXXXXX XXXXXXXX
0000_1024
H
DMADA4
XXXXXXXX XXXXXXXX
[R/W]
XXXXXXXX XXXXXXXX
0000_1028
H
to
0000_FFFC
H

Reserved
Prelminary
2004.11.12