Block diagram, Mb15f74ul – FUJITSU MB15F74UL User Manual

Page 4

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MB15F74UL

4

BLOCK DIAGRAM

(9)

Clock

Data

LE

PS

RF

Xfin

RF

fin

RF

OSC

IN

fin

IF

PS

IF

V

CCIF

GND

IF

fp

IF

Do

IF

LD

IF

T1

T2

T1

T2

FC

RF

SW

RF

LDS

Do

RF

OR

LD

/

fout

LD
fr

IF

fr

RF

fp

IF

fp

RF

fr

IF

fr

RF

fp

RF

C
N

1

C
N

2

AND

V

CCRF

GND

RF

Vp

RF

(19)

( )

(11)

(17)

(18)

(12)

(13)

(10)

(8)

(7)

(3)

(4)

(1)

(5)

(15)

GND

(20)

(16)

14

Xfin

IF

(2)

Vp

IF

(6)

Intermittent

mode control

(IF-PLL)

Prescaler

(IF-PLL)

(32/33, 64/65)

7 bit latch

11 bit latch

Binary 7-bit

swallow counter

(IF-PLL)

Binary 11-bit

programmable

counter (IF-PLL)

Phase

comp.

(IF-PLL)

Charge

pump

(IF-PLL)

Current

Switch

2 bit latch

14 bit latch

1 bit latch

Binary 14-bit pro-

grammable ref.
counter(IF-PLL)

C/P setting

counter

Lock Det.

(IF-PLL)

2 bit latch

14 bit latch

1 bit latch

Binary 14-bit pro-

grammable ref.

counter (RF-PLL))

C/P setting

counter

Selector

Prescaler

(RF-PLL)

(64/65, 128/129)

Lock Det.

(RF-PLL)

Intermittent

mode control

(RF-PLL)

3 bit latch

FC

IF

SW

IF

LDS

3 bit latch

7 bit latch

11 bit latch

Binary 7-bit

swallow counter

(RF-PLL)

Binary 11-bit

programmable

counter (RF-PLL)

Phase

comp.

(RF-PLL)

Fast lock

Tuning

Charge

pump

(RF-PLL)

Current

Switch

Schmitt

circuit

Latch selector

Schmitt

circuit

Schmitt

circuit

23-bit shift register

Fast

lock

Tuning

LD

RF

fp

RF

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