Marantz SUPER AUDIO CD PLAYER SA8400 User Manual
Page 35
3-8
No. Pin Name
I/O Functions
63 ZDFL
O
Lch zero-data detection fl ag (at the time of mcom setup). It will be set to "H" if non-sound data continues 300
msecs.
64 DSAL
O
DSD data output terminal for Lch speaker.
65 ZDFR
O
Rch zero-data detection fl ag (at the time of mcom setup). It will be set to "H" if non-sound data continues 300
msecs.
66 DSAR
O
DSD data output terminal for Rch speaker.
67 VDDSD
-
+3.3V Power for DSD data output.
68 ZDFC
O
Cch zero-data detection fl ag (at the time of mcom setup). It will be set to "H" if non-sound data continues 300
msecs.
69 DSAC
O
DSD data output terminal for Cch speaker.
70 ZDFLFE
O
LFEch zero-data detection fl ag (at the time of mcom setup). It will be set to "H" if non-sound data continues 300
msecs.
71 DSASW
O
DSD data output terminal for SWch speaker.
72 VSDSD
-
Ground for DSD data output.
73 ZDFLS
O
LSch zero-data detection fl ag (at the time of mcom setup). It will be set to "H" if non-sound data continues 300
msecs.
74 DSALS
O
DSD data output terminal for LSch speaker.
75 ZDFRS
O
RSch zero-data detection fl ag (at the time of mcom setup). It will be set to "H" if non-sound data continues 300
msecs.
76 DSARS
O
DSD data output terminal for RSch speaker.
77 VDDSD
O
+3.3V Power for DSD data output.
78 IOUT0
O
Data output terminal 0 for IEEE1394 link chip I/F.
79 IOUT1
O
Data output terminal 1 for IEEE1394 link chip I/F.
80 VSC
-
Ground for CORE.
81 IOUT2
O
Data output terminal 2 for IEEE1394 link chip I/F.
82 IOUT3
O
Data output terminal 3 for IEEE1394 link chip I/F.
83 VDC
-
+2.5V Power for CORE.
84 IOUT4
O
Data output terminal 4 for IEEE1394 link chip I/F.
85 IOUT5
O
Data output terminal 5 for IEEE1394 link chip I/F.
86 VSIO
-
Ground for I/O.
87 IANCO
O
Transmission information data output terminal for IEEE1394 link chip I/F.
88 IFULL
I
Data transmission hold request signal input terminal for IEEE1394 link chip I/F.
89 IEMPTY
I
High speed transmission request signal input terminal for IEEE1394 link chip I/F.
90 VDIO
-
+3.3V Power for I/O.
91 IFRM
O
Frame reference signal output terminal for IEEE1394 link chip I/F.
92 IOUTE
O
Enable signal output terminal for IEEE1394 link chip I/F.
93 IBCK
O
Data transmission clock output terminal for IEEE1394 link chip I/F.
94 VSC
-
Ground for CORE.
95 TESTI
I
TEST input terminal. It fi xed to "H" potential.
96 TESTI
I
TEST input terminal. It fi xed to "L" potential.
97 TESTI
Ipu TEST input terminal. It fi xed to "H" potential.
98 TESTO
O
TEST output terminal. (open)
99 VDC
-
+2.5V Power for CORE.
100 TESTI
I
TEST input terminal. It fi xed to "L" potential.
101 TESTI
I
TEST input terminal. It fi xed to "L" potential.
102 TESTI
I
TEST input terminal. It fi xed to "L" potential.
103 TESTI
I
TEST input terminal. It fi xed to "L" potential.
104 TESTI
I
TEST input terminal. It fi xed to "L" potential.
105 TESTI
I
TEST input terminal. It fi xed to "L" potential.
106 VSIO
-
Ground for I/O.
107 TESTI
I
TEST input terminal. It fi xed to "L" potential.
108 TESTI
I
TEST input terminal. It fi xed to "L" potential.
109 TESTI
I
TEST input terminal. It fi xed to "L" potential.
110 VDIO
-
+3.3V Power for I/O.
111 WAD0
I
External A/D data input terminal(LSB) for PSP physical disc mark detection.
112 WAD1
I
External A/D data input terminal for PSP physical disc mark detection.
113 WAD2
I
External A/D data input terminal for PSP physical disc mark detection.
114 WAD3
I
External A/D data input terminal for PSP physical disc mark detection.
115 VSIO
-
Ground for I/O.
116 VSC
-
Ground for CORE.
117 WAD4
I
External A/D data input terminal for PSP physical disc mark detection.
118 WAD5
I
External A/D data input terminal for PSP physical disc mark detection.
119 WAD6
I
External A/D data input terminal for PSP physical disc mark detection.
120 WAD7
I
External A/D data input terminal(MSB) for PSP physical disc mark detection.
121 VDC
-
+2.5V Power for CORE.
122 TESTI
I
TEST input terminal. It fi xed to "L" potential.
IC401 : CXD2753R