3 sdram ddr2 interface test circuit, 4 sdram ddr2 interface ac timing diagrams, Figure 5 – Marvel Group Integrated Controller 88F6281 User Manual
Page 91: Sdram ddr2 interface test circuit, Figure 6, Sdram ddr2 interface write ac timing diagram
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Electrical Specifications
AC Electrical Specifications
Copyright © 2008 Marvell
Doc. No. MV-S104859-U0 Rev. E
December 2, 2008, Preliminary
Document Classification: Proprietary Information
Page 91
8.6.2.3
SDRAM DDR2 Interface Test Circuit
Figure 5: SDRAM DDR2 Interface Test Circuit
8.6.2.4
SDRAM DDR2 Interface AC Timing Diagrams
Figure 6: SDRAM DDR2 Interface Write AC Timing Diagram
CL
50 ohm
VTT
Test Point
tDSS
tDSH
DQS
tWPRE
tDQSH
tDQSL
tWPST
DQ
tDIPW
tDOVB tDOVA
CLKn
CLK
tCL
tCH
DQSn
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