Document Outline

• Cover
• Product Overview
• Features
• Table of Contents
• List of Tables
• List of Figures
• Preface
• 1 Pin and Signal Descriptions
  • 1.1 Pin Logic
  • 1.2 Pin Descriptions
    • 1.2.1 Power Supply Pins
    • 1.2.2 Miscellaneous Pin Assignment
    • 1.2.3 DDR SDRAM Interface Pin Assignments
    • 1.2.4 PCI Express Interface Pin Assignments
    • 1.2.5 SATA Interface Pin Assignments
    • 1.2.6 Gigabit Ethernet Port Interface Pin Assignments
    • 1.2.7 Serial Management Interface (SMI) Interface Pin Assignments
    • 1.2.8 USB 2.0 Interface Pin Assignments
    • 1.2.9 JTAG Interface Pin Assignment
    • 1.2.10 Real Time Clock (RTC) Interface Pin Assignments
    • 1.2.11 NAND Flash Interface Pin Assignment
    • 1.2.12 MPP Interface Pin Assignment
    • 1.2.13 Two-Wire Serial Interface (TWSI) Interface
    • 1.2.14 UART Interface
    • 1.2.15 Audio (S/PDIF / I2S) Interface
    • 1.2.16 Serial Peripheral Interface (SPI) Interface
    • 1.2.17 Secure Digital Input/Output (SDIO) Interface
    • 1.2.18 Time Division Multiplexing (TDM) Interface
    • 1.2.19 Transport Stream (TS) Interface
    • 1.2.20 Precise Timing Protocol (PTP) Interface
  • 1.3 Internal Pull-up and Pull-down Pins
• 2 Unused Interface Strapping
• 3 88F6281 Pin Map and Pin List
• 4 Pin Multiplexing
  • 4.1 Multi-Purpose Pins Functional Summary
  • 4.2 Gigabit Ethernet (GbE) Pins Multiplexing on MPP
  • 4.3 TSMP (TS Multiplexing Pins) on MPP
• 5 Clocking
  • 5.1 Spread Spectrum Clock Generator (SSCG)
• 6 System Power Up/Down and Reset Settings
  • 6.1 Power-Up/Down Sequence Requirements
    • 6.1.1 Power-Up Sequence Requirements
    • 6.1.2 Power-Down Sequence Requirements
  • 6.2 Hardware Reset
    • 6.2.1 Reset Out Signal
    • 6.2.2 Power On Reset (POR)
    • 6.2.3 SYSRSTn Duration Counter
  • 6.3 PCI Express Reset
    • 6.3.1 PCI Express Root Complex Reset
    • 6.3.2 PCI Express Endpoint Reset
  • 6.4 Sheeva™ CPU TAP Controller Reset
  • 6.5 Pins Sample Configuration
  • 6.6 Serial ROM Initialization
    • 6.6.1 Serial ROM Data Structure
    • 6.6.2 Serial ROM Initialization Operation
  • 6.7 Boot Sequence
• 7 JTAG Interface
  • 7.1 TAP Controller
  • 7.2 Instruction Register
  • 7.3 Bypass Register
  • 7.4 JTAG Scan Chain
  • 7.5 ID Register
• 8 Electrical Specifications (Preliminary)
  • 8.1 Absolute Maximum Ratings
  • 8.2 Recommended Operating Conditions
  • 8.3 Thermal Power Dissipation
  • 8.4 Current Consumption
  • 8.5 DC Electrical Specifications
    • 8.5.1 General 3.3V (CMOS) DC Electrical Specifications
    • 8.5.2 RGMII, SMI and REF_CLK_XIN 1.8V (CMOS) DC Electrical Specifications
    • 8.5.3 SDRAM DDR2 Interface DC Electrical Specifications
    • 8.5.4 Two-Wire Serial Interface (TWSI) 3.3V DC Electrical Specifications
    • 8.5.5 Serial Peripheral Interface (SPI) 3.3V DC Electrical Specifications
    • 8.5.6 Time Division Multiplexing (TDM) 3.3V DC Electrical Specifications
  • 8.6 AC Electrical Specifications
    • 8.6.1 Reference Clock AC Timing Specifications
    • 8.6.2 SDRAM DDR2 Interface AC Timing
      • 8.6.2.1 SDRAM DDR2 Interface AC Timing Table
      • 8.6.2.2 SDRAM DDR2 Clock Specifications
      • 8.6.2.3 SDRAM DDR2 Interface Test Circuit
      • 8.6.2.4 SDRAM DDR2 Interface AC Timing Diagrams
    • 8.6.3 Reduced Gigabit Media Independent Interface (RGMII) AC Timing
      • 8.6.3.1 RGMII AC Timing Table
      • 8.6.3.2 RGMII Test Circuit
      • 8.6.3.3 RGMII AC Timing Diagram
    • 8.6.4 Gigabit Media Independent Interface (GMII) AC Timing
      • 8.6.4.1 GMII AC Timing Table
      • 8.6.4.2 GMII Test Circuit
      • 8.6.4.3 GMII AC Timing Diagrams
    • 8.6.5 Media Independent Interface/Marvell Media Independent Interface (MII/MMII) AC Timing
      • 8.6.5.1 MII/MMII MAC Mode AC Timing Table
      • 8.6.5.2 MII/MMII MAC Mode Test Circuit
      • 8.6.5.3 MII/MMII MAC Mode AC Timing Diagrams
    • 8.6.6 Serial Management Interface (SMI) AC Timing
      • 8.6.6.1 SMI Master Mode AC Timing Table
      • 8.6.6.2 SMI Master Mode Test Circuit
      • 8.6.6.3 SMI Master Mode AC Timing Diagrams
    • 8.6.7 JTAG Interface AC Timing
      • 8.6.7.1 JTAG Interface AC Timing Table
      • 8.6.7.2 JTAG Interface Test Circuit
      • 8.6.7.3 JTAG Interface AC Timing Diagrams
    • 8.6.8 Two-Wire Serial Interface (TWSI) AC Timing
      • 8.6.8.1 TWSI AC Timing Table
      • 8.6.8.2 TWSI Test Circuit
      • 8.6.8.3 TWSI AC Timing Diagrams
    • 8.6.9 Sony/Philips Digital Interconnect Format (S/PDIF) AC Timing
      • 8.6.9.1 S/PDIF AC Timing Table
      • 8.6.9.2 S/PDIF Test Circuit
    • 8.6.10 Inter-IC Sound Interface (I2S) AC Timing
      • 8.6.10.1 Inter-IC Sound (I2S) AC Timing Table
      • 8.6.10.2 Inter-IC Sound (I2S) Test Circuit
      • 8.6.10.3 Inter-IC Sound (I2S) AC Timing Diagrams
    • 8.6.11 Time Division Multiplexing (TDM) Interface AC Timing
      • 8.6.11.1 TDM Interface AC Timing Table
      • 8.6.11.2 TDM Interface Test Circuit
      • 8.6.11.3 TDM Interface Timing Diagrams
    • 8.6.12 Serial Peripheral Interface (SPI) AC Timing
      • 8.6.12.1 SPI (Master Mode) AC Timing Table
      • 8.6.12.2 SPI (Master Mode) Test Circuit
      • 8.6.12.3 SPI (Master Mode) Timing Diagrams
    • 8.6.13 Secure Digital Input/Output (SDIO) Interface AC Timing
      • 8.6.13.1 Secure Digital Input/Output (SDIO) AC Timing Table
      • 8.6.13.2 Secure Digital Input/Output (SDIO) Test Circuit
      • 8.6.13.3 Secure Digital Input/Output (SDIO) AC Timing Diagrams
    • 8.6.14 Transport Stream (TS) Interface AC Timing
      • 8.6.14.1 Transport Stream Interface AC Timing Table
      • 8.6.14.2 Transport Stream Interface Test Circuit
      • 8.6.14.3 Transport Stream Interface Timing Diagrams
  • 8.7 Differential Interface Electrical Characteristics
    • 8.7.1 Differential Interface Reference Clock Characteristics
      • 8.7.1.1 PCI Express Interface Differential Reference Clock Characteristics
    • 8.7.2 PCI Express Interface Electrical Characteristics
      • 8.7.2.1 PCI Express Interface Driver and Receiver Characteristics
      • 8.7.2.2 PCI Express Interface Test Circuit
    • 8.7.3 SATA Interface Electrical Characteristics
      • 8.7.3.1 SATA-I Interface Gen1i Mode Driver and Receiver Characteristics
      • 8.7.3.2 SATA-II Interface Gen2i Mode Driver and Receiver Characteristics
    • 8.7.4 USB Electrical Characteristics
      • 8.7.4.1 USB Driver and Receiver Characteristics
      • 8.7.4.2 USB Interface Driver Waveforms
• 9 Thermal Data (Preliminary)
• 10 Package
• 11 Part Order Numbering/Package Marking
  • 11.1 Part Order Numbering
  • 11.2 Package Marking
• A Revision History
• Contact Information