Intel 41210 - Manual (Page 52)

52 Intel® 41210 Serial to Parallel PCI Bridge Design Guide
Circuit Implementations
Figure 25. Bandgap Analog Voltage Filter Circuit
Note: .
• Place C as close as possible to package pin.
• R must be placed between the 2.5V supply and L.
• Route VCCBGPE and VSSBGPE as differential traces.
• VCCBGPE and VSSBGPE traces must be ground referenced (No 2.5V references).
• VSSBGPE should be grounded at the capacitor.
• Max total board trace length = 1.2”.
• Min trace space to other nets = 30 mils.
B2726 -01
R
C
VSSBGPE
Note: Ground VSSBGPE at capacitor
VSS
Intel fi 41210
Bridge
VCCBGPE
L
2.5 V
Board Trace:
Trace Width > 25 mils
Trace Spacing < 10 mils
Trace Length < 600 mils
Breakout Trace:
Trace Width > 6 mils
Trace Spacing < 6 mils
Trace Length < 600 mils
Board Route
Traces
Breakout
Traces