Figure 3.4: advanced chipset features screen, 1 dram timing selectable, 2 cas latency time – Intel Socket 478 AIMB-744 User Manual
Page 49: 3 active to precharge delay, 4 dram ras# to cas# delay, 5 dram ras# precharge, 6 memory frequency
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Chapter 3
3.5.1 DRAM Timing Selectable
This item allows you to control the DRAM speed. The selections are
"Manual" or "By SPD".
3.5.2 CAS Latency Time
This controls the latency between DDR RAM read command and the
time that the data actually becomes available. Leave this on the default
setting. The options are "2", "2.5" or "3".
3.5.3 Active to Precharge Delay
This item allows you to select the value in this field, depending on
whether the board has paged DRAMs or EDO (extended data output)
DRAMs. The Choice: "8", "7", "6" and "5".
3.5.4 DRAM RAS# to CAS# Delay
In order to improve performance, certain space in memory is reserved for
ISA cards. This memory must be mapped into the memory space below
16MB. The Choice: "4", "3" and ''2".
3.5.5 DRAM RAS# Precharge
This controls the idle clocks after issuing a precharge command to
DRAM. Leave this on the default setting. The choice : "4", "3" and "2".
3.5.6 Memory Frequency
To adjust the frequency of memory. The choice : "DDR266", "DDR333",
"DDR400" and "Auto".
Figure 3.4: Advanced chipset features screen