Intel Xeon - Manual (Page 13)

Intel ® Xeon™ Processor, Intel ® E7520 Chipset, Intel ® 6300ESB ICH Development Kit User’s Manual 13
Platform Management
Platform Management
2
The following sections describe how the system power management operates and how the different
ACPI states are implemented. Platform management involves:
• ACPI implementation specific details
• System monitoring, control and response to thermal, voltage and intrusion events
• BIOS security
2.1 Power Button
The system power button is connected to the I/O controller component. When the button is pressed,
the I/O controller receives the signal and transitions the system to the proper sleep state as
determined by the operating system and software. If the power button is pressed and held for four
seconds, the system powers off (S5 state). This feature is called power button override and is
particularly helpful in case of system hang and system lock.
2.2 Soft Off
The I/O controller incorporates a SLP_S4 output signal which routes to the power supply. This
signal has register access that allows software to deactivate the power supply. When SLP_S4 goes
active, the power supply cuts main power but keeps 5 V auxiliary power rails available. 5 V
auxiliary voltage is active while the power supply receives AC power.
2.3 Sleep States Supported
The I/O controller controls the system sleep states. States S0, S1, S3, S4, and S5 are supported. The
platform enters sleep states in response to BIOS, operating system or user actions. Normally the
operating system determines which sleep state to transition into. However, a four-second power
button override event places the system immediately into S5. When transitioning into a software-
invoked sleep state, the I/O controller attempts to gracefully put the system to sleep by first going
into the processor C2 state.
2.3.1 S0 State
This is the normal operating state, even though there are some power savings modes in this state
using processor Halt and Stop Clock (processor C1 and C2 states). S0 affords the fastest wake-up
response time of any sleep state because the system remains fully powered and memory is intact.