Intel SR9000MK4U User Manual
Page 199
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Intel
®
Server System SR9000MK4U Product Guide
177
A
B
reserved
A
C
reserved
A
D
reserved
A
E
reserved
A
F
reserved
B
7
reserved
B
8
reserved
B
9
reserved
B
A
reserved
B
B
reserved
B
C
reserved
B
D
reserved
B
E
reserved
B
F
reserved
C
X
reserved
D
X
reserved
E
X
reserved
F
X
reserved
Table 32. POST Codes Generated by SAL and Logged at the Seven
Segment LED
No
Code
Description
Operation to
Recover
1
100
BSP selection
W Mutex service initialization
NVSDA service initialization
AP synchronization control
Chipset low-level initialization
PAL status check
Check previous SEL
2
1EB
RTC initialization
3
1E3
Super IO initialization
Table 31. POST Codes Generated by the BMC and Logged at the Seven
Segment LED
Code
Descriptions
Classification
Operation to
Recover
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