Graph ics ap er ture size 31, 16 bit 31, 8 bit 31 – Intel SBC-370 User Manual
Page 29: Pci frame buffer uswc 31, Piix4 de layed trans ac tion 31, Piix4 pas sive re lease 31, Search for mda re sources 31, Usb func tion 31, Usb pas sive re lease 31, Uswc write post 31
PCI Frame Buffer USWC >:
Used to specify whether or not a caching of the PCI VGA frame
buffer is allowed.
USWC Write Post >:
Enable or disable the use of Uncacheable, Speculatable, Write-Com-
bined memory.
Graphics Aperture Size >:
Define the size of Graphics Aperture.
Search for MDA Resources >:
Allows the BIOS to search for MDA resources when
Yes
is specified.
8bit I/O Recovery Time >:
Define the length of time for 8 bit I/O recovery.
16bit I/O Recovery Time >:
Define the length of time for 16 bit I/O recovery.
USB Passive Release >:
Specify whether or not PIIX4 is allowed to use Passive Release
while transferring control data for USB transactions.
PIIX4 Passive Release >:
PIIX4 points to the Intel 82371AB PCI/ISA/IDE Xcelerator chip. Set-
ting this option to
Enabled
will prioritize PCI at the top, then IDE and ISA.
PIIX4 Delayed Transaction >:
Used to enable or disable the embedded 32-bit posted write
buffer, which supports delay transaction.
USB Function >:
Enable or disable the USB (Universal Serial Bus) functions.
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AMI BIOS Setup Menus