Samsung S3F80JB - Manual (Page 148)

INSTRUCTION SET S3F80JB
6-20
BITR
— Bit Reset
BITR dst.b
Operation: dst(b)
← 0
The BITR instruction clears the specified bit within the destination without affecting any other bits
in the destination.
Flags: No flags are affected.
Format:
Bytes Cycles Opcode
(Hex)
Addr Mode
dst
opc dst | b | 0 2 4 77 rb
NOTE: In the second byte of the instruction format, the destination address is four bits, the bit address 'b'
is three bits, and the LSB address value is one bit in length.
Example: Given: R1 = 07H:
BITR R1.1
→
R1 = 05H
If the value of working register R1 is 07H (00000111B), the statement "BITR R1.1" clears bit one
of the destination register R1, leaving the value 05H (00000101B).