Samsung S3F80JB User Manual

Page 233

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S3F80JB

RESET

8-15

HARDWARE RESET VALUES

Tables 8-3 list the reset values for CPU and system registers, peripheral control registers, and peripheral data
registers following a reset operation. The following notation is used to represent reset values:

— A "1" or a "0" shows the reset bit value as logic one or logic zero, respectively.

— An 'x' means that the bit value is undefined after a reset.

— A dash ('–') means that the bit is either not used or not mapped (but a 0 is read from the bit position)

Table 8-3. Set 1, Bank 0 Register Values After Reset

Address

Bit Values After Reset

Register Name

Mnemonic

Dec

Hex 7 6 5 4 3 2 1 0

Timer

0

Counter

Register

T0CNT 208

D0H 0 0 0 0 0 0 0 0

Timer

0

Data

Register

T0DATA 209

D1H 1 1 1 1 1 1 1 1

Timer

0

Control

Register

T0CON 210

D2H 0 0 0 0 0 0 0 0

Basic

Timer

Control

Register

BTCON 211

D3H 0 0 0 0 0 0 0 0

Clock

Control

Register

CLKCON 212

D4H 0 0 0 0 0 0 0 0

System

Flags

Register

FLAGS 213

D5H x x x x x x 0 0

Register

Pointer

0

RP0

214

D6H 1 1 0 0 0

Register

Pointer

1

RP1

215

D7H 1 1 0 0 1

Location D8H (SPH) is not mapped.

Stack

Pointer

(Low

Byte)

SPL

217

D9H x x x x x x x x

Instruction

Pointer

(High

Byte)

IPH

218

DAH x x x x x x x x

Instruction

Pointer

(Low

Byte)

IPL

219

DBH x x x x x x x x

Interrupt Request Register (Read-
Only)

IRQ

220

DCH 0 0 0 0 0 0 0 0

Interrupt

Mask

Register

IMR

221

DDH x x x x x x x x

System

Mode

Register

SYM 222

DEH 0 – – x x x 0 0

Register

Page

Pointer

PP

223

DFH 0 0 0 0 0 0 0 0

Port

0

Data

Register

P0

224

E0H 0 0 0 0 0 0 0 0

Port

1

Data

Register

P1

225

E1H 0 0 0 0 0 0 0 0

Port

2

Data

Register

P2

226

E2H 0 0 0 0 0 0 0 0

Port

3

Data

Register

P3

227

E3H 0 – 0 0 1 1 0 0

Port

4

Data

Register

P4

228

E4H 0 0 0 0 0 0 0 0

Port

2

Interrupt

Enable

Register

P2INT 229

E5H 0 0 0 0 0 0 0 0

Port

2

Interrupt

Pending

Register

P2PND 230

E6H 0 0 0 0 0 0 0 0

Port

0

Pull-up

Enable

Register

P0PUR 231

E7H 0 0 0 0 0 0 0 0

Port

0

Control

Register

(High

Byte)

P0CONH 232

E8H 0 0 0 0 0 0 0 0

Port

0

Control

Register

(Low

Byte)

P0CONL 233

E9H 0 0 0 0 0 0 0 0

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