Ese, *ese – Lakeshore Learning Materials 642 User Manual

Page 60

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Lake Shore Model 642 Electromagnet Power Supply User’s Manual

5-8

Computer Interface Operation

5.1.4.2

Status Register Sets

As shown in Figure 5-1, there are five register sets in the status system of the Model 642; Standard Event Status
Register, Operation Event Register, Hardware Error Status Register, Operational Error Status Register, and the Persistent
Switch Error Register.

5.1.4.2.1

Standard Event Status Register Set

The Standard Event Status Register reports the following interface related instrument events: power on detected,
command syntax errors, command execution errors, query errors, operation complete. Any or all of these events may be
reported in the standard event summary bit through the enable register, see Figure 5-2. The Standard Event Status Enable
command (*ESE) programs the enable register and the query command (*ESE?) reads it. *ESR? reads and clears the
Standard Event Status Register. The used bits of the Standard Event Register are described as follows:

Power On (PON), Bit (7) – This bit is set to indicate an instrument off-on transition.

Command Error (CME), Bit (5) – This bit is set if a command error has been detected since the last reading. This

means that the instrument could not interpret the command due to a syntax error, an unrecognized header,
unrecognized terminators, or an unsupported command.

Execution Error (EXE), Bit (4) – This bit is set if an execution error has been detected. This occurs when the

instrument is instructed to do something not within its capabilities.

Query Error (QYE), Bit (2) – This bit indicated a query error. It occurs rarely and involves loss of data because the

output queue is full.

Operation Complete (OPC), Bit (0) – When *OPC is sent, this bit will be set when the instrument has completed all

pending operations. The operation of this bit is not related to the *OPC? command which is a separate interface
feature. Refer to Paragraph 5.1.4.4.6 for more information.


Name

Name

Bit

Bit

AND

CME

5

Not

PON

*ESE, *ESE?

Used

Standard Event

Status Enable

7

6

Not

OPC

Not

EXE

QYE

Used

Used

2

4

3

AND

1

0

AND

CME

5

6

7

Standard Event

*ESR?

Status Register

AND

PON

Used

Not

0

1

3

4

2

QYE

AND

EXE

Used

Not

Used

Not

OPC

OR

To bit 5 (ESB) of

Status Byte Register

(See Figure 5-1.)

Figure 5-2. Standard Event Status Register

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