NXP Semiconductors ISP1183 - Manual (Page 4)

NXP Semiconductors
UM10044
ISP1183 Low-Power USB Peripheral Controller PC Eval Kit
For the firmware development:
• x86 CPU platform: Borland Turbo C++ 3.0 or above.
• ISP1183 eval diskette.
Fig 2. System structure of the ISP1183 PC eval kit
3. Jumper settings on the ISP1183 eval board
The ISP1183 eval board is plugged into the peripheral PC. It will occupy I/O and IRQ
resources of the peripheral PC. To avoid possible conflicts in settings, remove all
unnecessary cards from the peripheral PC. Sound cards and network cards may cause
IRQ conflicts.
Jumper JP1 enables and disables the level-shift module.
Table 1. JP1
Isolate data bus Disable Enable (default)
Short pins 1 - 2 2 - 3
JP2 sets the I/O power supply of the eval board. Default setting is 1.8 V.
Table 2. JP2
I/O voltage select 1.8 V (default) 3.3 V
Short pins 1 - 2 2 - 3
UM10044_4 © NXP B.V. 2007. All rights reserved.
User manual Rev. 04 — 6 February 2007 4 of 18