Renesas R61509V - Manual (Page 172)

R61509V Target Spec
Rev. 0.11 April 25, 2008, page 172 of 181
AC Characteristics
(VCC= 2.50V~3.30V, IOVCC=1.65V~3.30V, Ta= -40°C~+85°C *
See note 1
)
Clock Characteristics
Table 88
Item Symbol Unit Test condition Min. Typ. Max. Note
Oscillation clock f osc kHz VCC=IOVCC=3.0V 631 678 725 9
80-system 18-/16-/9-/8-bit Bus interface Timing Characteristics
(1-/2-/3-transfer, IOVCC=1.65V~3.30V) TBD
Table 89
Items Symbol Unit
Test
condition
Min. Typ. Max.
Write t CYCW ns Figure A 75
(TBD)
－ － Bus cycle time
Read t CYCR ns Figure A 450
(TBD)
－ －
Write low- level pulse width PW LW ns Figure A 30
(TBD) － －
Read low-level pulse width PW LR ns Figure A 170
(TBD)
－ －
Write high-level pulse width PW HW ns Figure A 25
(TBD)
－ －
Read high-level pulse width PW HR ns Figure A 250
(TBD) － －
Write/ Read rise/fall time
t WRr，
WRf
ns Figure A － － 15
Write (RS to CSX,
WRX)
ns Figure A 0
(TBD) － －
Setup time
Read (RS to CSX,
RDX)
t AS
ns Figure A 10
(TBD) － －
Address hold time t AH ns Figure A 2
(TBD)
－ －
Write data setup time t DSW ns Figure A 25
(TBD)
－ －
Write data hold time t H ns Figure A 10
(TBD) － －
Read data delay time t DDR ns Figure A － － 150
Read data hold time t DHR ns Figure A 5
(TBD)
－ －