Renesas R61509V User Manual
Page 18
R61509V
Target
Spec
Rev. 0.11 April 25, 2008, page 18 of 181
Table 9 Others (test, dummy pins)
Signal I/O
Connect
to
Function
When not in
use
VTEST
O
Open
Test pin. Leave open.
Open
VREFC
I
GND
Test pin. Make sure to fix to the GND level.
-
VREFD
O
Open
Test pin. Leave open.
Open
VREF
O
Open
Test pin. Leave open.
Open
VDDTEST
I
GND
Test pin. Make sure to fix to the GND level.
-
VMON
O
Open
Test pin. Leave open.
Open
VCIR
O
Open
Test pin. Leave open.
Open
GNDDUM1-
10,
AGNDDUM1
-5,
VCCDUM,
IOVCCDUM
1-2
O
-
Pins to fix the electrical potentials of unused interface and test pins.
Open
DUMMYR
1-4
-
-
DUMMYR1 and DUMMYR4, DUMMYR2 and DUMMYR3 are short-
circuited within the chip for COG contact resistance measurement.
Open
VGLDMY
1-4
O Unused
gate line
Output VGL level. Use when fixing unused gate line of the panel.
Open
DUMMYA
―
Open
Dummy pad. Leave open.
OPEN
DUMMYB
―
Open
Dummy pad. Leave open.
OPEN
DUMMYC
―
Open
Dummy pad. Leave open.
OPEN
TESTO1-15 O ―
Dummy pad. Leave open.
OPEN
TEST
1-5
I
GND
Test pin. Connect to GND.
GND
TS0-8
O
Open
Test pin. Leave open.
OPEN
VPP3B
I
AGND
Test pin. Connect to AGND.
―
TSC
I
GND
Test pin. Connect to GND.
GND
Patents of dummy pin, which is used to fix to VCC or GND are granted.
PATENT ISSUED:
United States Patent No. 6,924,868
United States Patent No. 6,323,930
Japanese Patent No. 3,980,066
Korean Patent No. 401,270
Taiwanese Patent No. 175,413