TDK GENESYS 750W HALF RACK - Manual (Page 75)

83-507-5002 Rev. B
67
3. Status Enable Register
The Status Enable Register is set by the user to Enable SRQs for changes in power supply
status.
Table 7-12: Status Enable Register
BIT Status name
Status
symbol
Bit Set condition Bit reset condition
0 (LSB) Constant Voltage CV
1 Constant Current CC
2 No Fault NFLT
3 Fault active FLT
User command:
“SENA nn” is
received, where
nn is hexadeci-
mal bits.
User command: “SENA
nn” is received, where nn
is hexadecimal bits.
If “nn”=00, no SRQ is sent
when there is a change in
Status Condition Register.
4 Auto-Restart enabled AST Always zero Always zero
5 Fold enabled FDE Always zero Always zero
6 Spare Spare Always zero Always zero
7 (MSB) Local Mode LCL
“SENA nn”
command
“SENA nn”
command
4. Status Event Register
The Status Event Register will set a bit if a change in the power supply status occurs and it is en-
abled. The register is cleared when the “SEVE?” or “CLS” commands are received. A change in
this register will generate SRQ.
Table 7-13: Status Event Register
BIT Status name
Status sym-
bol
Bit Set condition Bit reset condition
0 (LSB) Constant Voltage CV
1 Constant Current CC
2 No Fault NFLT
3 Fault active FLT
Changes in status
occur and it is
Enabled.
The change can
set a bit, but
when the change
clears the bit re-
mains set.
4
Auto-Restart en-
abled
0 Always zero
5 Fold enabled 0 Always zero
6 Spare 0 Always zero
7 (MSB) Local Mode LCL
Unit is set to Lo-
cal by pressing
front panel
REM/LOC button.
Entire Event Register is
cleared when user sends
“SEVE?” command to
read the register.
“CLS” and power-up also
clear the Status Event
Register.