Texas Instruments TMS320VC5402 User Manual

Page 6

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TMS320VC5402

FIXEDĆPOINT DIGITAL SIGNAL PROCESSOR

SPRS079E – OCTOBER 1998 – REVISED AUGUST 2000

6

POST OFFICE BOX 1443

HOUSTON, TEXAS 77251–1443

Pin Assignments for the TMS320VC5402GGU (144-Pin BGA) Package

SIGNAL

NAME

BGA BALL #

SIGNAL

NAME

BGA BALL #

SIGNAL

NAME

BGA BALL #

SIGNAL

NAME

BGA BALL #

NC

A1

NC

N13

NC

N1

A19

A13

NC

B1

NC

M13

NC

N2

NC

A12

VSS

C2

DVDD

L12

HCNTL0

M3

VSS

B11

DVDD

C1

VSS

L13

VSS

N3

DVDD

A11

A10

D4

CLKMD1

K10

BCLKR0

K4

D6

D10

HD7

D3

CLKMD2

K11

BCLKR1

L4

D7

C10

A11

D2

CLKMD3

K12

BFSR0

M4

D8

B10

A12

D1

NC

K13

BFSR1

N4

D9

A10

A13

E4

HD2

J10

BDR0

K5

D10

D9

A14

E3

TOUT0

J11

HCNTL1

L5

D11

C9

A15

E2

EMU0

J12

BDR1

M5

D12

B9

NC

E1

EMU1/OFF

J13

BCLKX0

N5

HD4

A9

HAS

F4

TDO

H10

BCLKX1

K6

D13

D8

VSS

F3

TDI

H11

VSS

L6

D14

C8

NC

F2

TRST

H12

HINT/TOUT1

M6

D15

B8

CVDD

F1

TCK

H13

CVDD

N6

HD5

A8

HCS

G2

TMS

G12

BFSX0

M7

CVDD

B7

HR/W

G1

NC

G13

BFSX1

N7

NC

A7

READY

G3

CVDD

G11

HRDY

L7

HDS1

C7

PS

G4

HPIENA

G10

DVDD

K7

VSS

D7

DS

H1

VSS

F13

VSS

N8

HDS2

A6

IS

H2

CLKOUT

F12

HD0

M8

DVDD

B6

R/W

H3

HD3

F11

BDX0

L8

A0

C6

MSTRB

H4

X1

F10

BDX1

K8

A1

D6

IOSTRB

J1

X2/CLKIN

E13

IACK

N9

A2

A5

MSC

J2

RS

E12

HBIL

M9

A3

B5

XF

J3

D0

E11

NMI

L9

HD6

C5

HOLDA

J4

D1

E10

INT0

K9

A4

D5

IAQ

K1

D2

D13

INT1

N10

A5

A4

HOLD

K2

D3

D12

INT2

M10

A6

B4

BIO

K3

D4

D11

INT3

L10

A7

C4

MP/MC

L1

D5

C13

CVDD

N11

A8

A3

DVDD

L2

A16

C12

HD1

M11

A9

B3

VSS

L3

VSS

C11

VSS

L11

CVDD

C3

NC

M1

A17

B13

NC

N12

NC

A2

NC

M2

A18

B12

NC

M12

NC

B2

† DVDD is the power supply for the I/O pins while CVDD is the power supply for the core CPU. VSS is the ground for both the I/O pins and the core

CPU.

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