Special function registers – Texas Instruments MSP430x11x1 User Manual
Page 8
MSP430x11x1
MIXED SIGNAL MICROCONTROLLER
SLAS241C – SEPTEMBER 1999 – REVISED JUNE 2000
8
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DALLAS, TEXAS 75265
special function registers
Most interrupt and module enable bits are collected into the lowest address space. Special function register bits
that are not allocated to a functional purpose are not physically present in the device. Simple software access
is provided with this arrangement.
interrupt enable 1 and 2
7
6
5
4
0
OFIE
WDTIE
3
2
1
rw-0
rw-0
rw-0
Address
0h
NMIIE
ACCVIE
rw-0
WDTIE:
Watchdog timer enable signal
OFIE:
Oscillator fault enable signal
NMIIE:
Nonmaskable interrupt enable signal
ACCVIE:
Access violation at flash memory
7
6
5
4
0
3
2
1
Address
01h
interrupt flag register 1 and 2
7
6
5
4
0
OFIFG
WDTIFG
3
2
1
rw-0
rw-1
rw-0
Address
02h
NMIIFG
WDTIFG:
Set on overflow or security key violation or
Reset on V
CC
power-on or reset condition at RST/NMI-pin
OFIFG:
Flag set on oscillator fault
NMIIFG:
Set via RST/NMI-pin
7
6
5
4
0
3
2
1
Address
03h
Legend
rw:
rw-0:
Bit can be read and written.
Bit can be read and written. It is reset by PUC
SFR bit is not present in device.