Texas Instruments TMS320TCI648x - Manual (Page 157)

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5.35 LSUn Control Register 2 (LSUn_REG2)
SRIO Registers
There are four of these registers, one for each LSU (see Table 91 ). LSUn_REG2 is shown in Figure 96
and described in Table 92 . For additional programming see Section 2.3.3 .
Table 91. LSUn_REG2 Registers and the Associated LSUs
Register Address Offset Associated LSU
LSU1_REG2 0408h LSU1
LSU2_REG2 0428h LSU2
LSU3_REG2 0448h LSU3
LSU4_REG2 0468h LSU4
Figure 96. LSUn Control Register 2 (LSUn_REG2)
31 0
DSP_ADDRESS
R/W-00000000h
LEGEND: R/W = Read/Write; -n = Value after reset
Table 92. LSUn Control Register 2 (LSUn_REG2) Field Descriptions
Bit Field Value Description
31–0 DSP_ADDRESS 00000000h 32-bit DSP byte address for the source of the LSU transaction
to
FFFFFFFFh
SPRUE13A – September 2006 Serial RapidIO (SRIO) 157
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