Xilinx XAPP169 - Manual (Page 10)

10 www.xilinx.com XAPP169 (v1.0) November 24, 1999
1-800-255-7778
MP3 NG: A Next Generation Consumer Platform R
11
11
11
RAS#
REFRESH
CONTROLLER
2,048
REFRESH
COUNTER
CAS#
256
256 (x16)
8
COLUMN-
ADDRESS BUFFER BURST COUNTER
ROW-
ADDRESS
MUX
CLK
CS#
WE#
CKE
256 (x16)
BANK1
MEMORY
ARRAY
(2,048 x 256 x 16)
SENSE AMPLIFIERS
I/O GATING
DQM MASK LOGIC
CONTROL
LOGIC
COLUMN
DECODER
COLUMN-
ADDRESS LATCH
8
MODE REGISTER
ROW-
ADDRESS
LATCH
11
ROW
DECODER
11
COMMAND
DECODE
DQ0-
DQ15
A0-A10, BA
16
8
DQML,
DQMH
256
2,048
BANK0
MEMORY
ARRAY
(2,048 x 256 x 16)
ROW
DECODER
ROW-
ADDRESS
LATCH
11
12
ADDRESS
REGISTER
12 SENSE AMPLIFIERS
I/O GATING
DQM MASK LOGIC
DATA
INPUT
REGISTER
DATA
OUTPUT
REGISTER
16
16
Figure 10: MT48LC1M16A1 Block Diagram
(Courtesy of Micron Technology, Inc.)
ENABLE AUTO PRECHARGE
tCH
tCL tCK
tAC
t LZ
tRP
tRAS
tRCD CAS Latency
tRC
DQM 3
CKE
CLK
A0-A9
DQ
BA
A10
tOH
D OUT m
tAH tAS
tAH tAS
tAH tAS
ROW
COLUMN m
(A0 - A7) 2
ROW
BANK BANK
ROW
ROW
BANK
tHZ
tOH
D OUT m + 3
tAC
tOH
tAC
tOH
tAC
D OUT m + 2 D OUT m + 1
COMMAND
tCMH tCMS
tCMH tCMS
NOP NOP NOP ACTIVE NOP READ NOP ACTIVE NOP
tCKH tCKS
T0 T1 T2 T3 T4 T5 T6 T7 T8
Figure 11: MT48LC1M16A1 Read Timing
(Courtesy of Micron Technology, Inc.)