Xilinx XAPP169 - Manual (Page 5)

MP3 NG: A Next Generation Consumer Platform
XAPP169 (v1.0) November 24, 1999 www.xilinx.com 5
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The RC32364 interfaces to the system through a 32-bit multiplexed address/data bus. The bus
offers a rich set of signals to control transfers of which only a subset was required for this
application.
Figure 4 shows the timing for read transactions on this bus.
M asterC lock
AD (31:0)
Addr Data Input
Addr(3:2)
ALE
D ataEn*
Ack*
Last*
R d*
C IP*
I/D *
D T/R *
W r*
Addr
Data Input
W idth(1:0)
Figure 4: RC32364 Read Timing
(Courtesy IDT)