Rainbow Electronics W90N740 - Manual (Page 58)

W90N740
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ADRS [15] ：Address bus alignment for external I/O bank 0~3
When ADRS is set, EBI bus is alignment to byte address format, and ignores DBWD [1:0] setting.
tACC [14:11] ：Access cycles （nOE or nWE active time）for external I/O bank 0~3
tACC [14:11] MCLK
0 0 0 0 Reserve
d
0 0 0 1 1
0 0 1 0 2
0 0 1 1 3
0 1 0 0 4
0 1 0 1 5
0 1 1 0 6
tACC [14:11] MCLK
1 0 0 0 9
1 0 0 1 11
1 0 1 0 13
1 0 1 1 15
1 1 0 0 17
1 1 0 1 19
1 1 1 0 21
1 1 1 1 23
tCOH [10:8] ：Chip selection hold-on time on nWBE for external I/O bank 0~3
tCOH [10:8] MCLK
0 0 0 0
0 0 1 1
0 1 0 2
0 1 1 3
1 0 0 4
1 0 1 5
1 1 0 6
1 1 1 7