Dc electrical characteristics, Ac electrical characteristics – Rainbow Electronics ADC1061 User Manual

Page 3

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DC Electrical Characteristics

The following specifications apply for V

a

e a

5V V

REF(

a

)

e

5V and V

REF(

b

)

e

GND unless otherwise specified Boldface

limits apply for T

A

e

T

J

e

T

MIN

to T

MAX

all other limits T

A

e

T

J

e

25 C

Symbol

Parameter

Conditions

Typical

Limit

Units

(Note 7)

(Note 8)

(Limits)

V

IN(1)

Logical ‘‘1’’ Input Voltage

V

a

e

5 25V

2 0

V (Min)

V

IN(0)

Logical ‘‘0’’ Input Voltage

V

a

e

4 75V

0 8

V (Max)

I

IN(1)

Logical ‘‘1’’ Input Current

V

IN(1)

e

5V

0 005

1 0

m

A (Max)

I

IN(0)

Logical ‘‘0’’ Input Current

V

IN(0)

e

0V

b

0 005

b

1 0

m

A (Max)

V

OUT(1)

Logical ‘‘1’’ Output Voltage

V

a

e

4 75V I

OUT

e b

360 mA

2 4

V (Min)

V

a

e

4 75V I

OUT

e b

10 mA

4 5

V (Min)

V

OUT(0)

Logical ‘‘0’’ Output Voltage

V

a

e

4 75V I

OUT

e

1 6 mA

0 4

V (Max)

I

OUT

TRI-STATE Output Current

V

OUT

e

5V

0 1

50

m

A (Max)

V

OUT

e

0V

b

0 1

b

50

m

A (Max)

DI

CC

DV

CC

Supply Current

CS e WR e RD e 0

0 1

2

mA (Max)

AI

CC

AV

CC

Supply Current

CS e WR e RD e 0

30

45

mA (Max)

AC Electrical Characteristics

The following specifications apply for V

a

e

a

5V t

r

e

t

f

e

20 ns V

REF(

a

)

e

5V and V

REF(

b

)

e

GND unless otherwise

specified Boldface limits apply for T

A

e

T

J

e

T

MIN

to T

MAX

all other limits T

A

e

T

J

e

25 C

Symbol

Parameter

Conditions

Typical

Limit

Units

(Note 7)

(Note 8)

(Limits)

t

CONV

Conversion Time from Rising Edge

Mode 1

1 2

1 8

m

s (Max)

of S H to Falling Edge of INT

t

CRD

Conversion Time for MODE 2

Mode 2

1 8

2 4

m

s (Max)

(RD Mode)

t

ACC1

Access Time (Delay from Falling

Mode 1 C

L

e

100 pF

20

50

ns (Max)

Edge of RD to Output Valid)

t

ACC2

Access Time (Delay from Falling

Mode 2 C

L

e

100 pF

t

CRD

a

50

ns (Max)

Edge of RD to Output Valid)

t

SH

Minimum Sample Time

(Figure 1)

(Note 9)

250

ns (Max)

t

1H

t

0H

TRI-STATE Control (Delay from Rising

R

L

e

1k C

L

e

10 pF

20

50

ns (Max)

Edge of RD to High-Z State)

t

INTH

Delay from Rising Edge of RD

10

50

ns (Max)

to Rising Edge of INT

t

ID

Delay from INT to Output Valid

C

L

e

100 pF

20

50

ns (Max)

t

P

Delay from End of Conversion

10

20

ns (Max)

to Next Conversion

SR

Slew Rate for Correct

2 5

V ms

Track-and-Hold Operation

3

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