Rainbow Electronics T89C51CC02 - Manual (Page 83)

Rev.A - May 17, 2001 83
Preliminary
T89C51CC02
CANGIT (S:9Bh)
CAN General Interrupt
Reset Value: 0x00 0000b
Figure 67. CANGIT Register
7 6 5 4 3 2 1 0
CANIT - OVRTIM OVRBUF SERG CERG FERG AERG
Bit Number Bit Mnemonic Description
7 CANIT
General interrupt flag (1)
This status bit is the image of all the CAN controller interrupts sent to the interrupt controller.
It can be used in the case of the polling method.
6 -
Reserved
The values read from this bit isindeterminate. Do not set this bit.
5 OVRTIM
Overrun CAN Timer
This status bit is set when the CAN timer switches 0xFFFF to 0x0000.
If the ENOVRTIM bit in the IE1 register is set, an interrupt is generated.
The user clears this bit in order to reset the interrupt.
4 OVRBUF
Overrun BUFFER
0 - no interrupt.
1 - IT turned on
This bit is set when the buffer is full.
Bit resettable by user.
see Figure 59.
3 SERG
Stuff error General
Detection of more than five consecutive bits with the same polarity.
This flag can generate an interrupt.
2 CERG
CRC errorGeneral
The receiver performs a CRC check on each destuffed received message from the start of frame up
to the data field.
If this checking does not match with the destuffed CRC field, a CRC error is set.
This flag can generate an interrupt.
1 FERG
Form error General
The form error results from one or more violations of the fixed form in the following bit fields:
CRC delimiter
acknowledgment delimiter
end_of_frame
This flag can generate an interrupt.
0 AERG
Acknowledgment error General
No detection of the dominant bit in the acknowledge slot.
This flag can generate an interrupt.