Rainbow Electronics W79E8213R - Manual (Page 23)

Preliminary W79E8213/W79E8213R Data Sheet
Publication Release Date: July 11, 2008
- 23 - Revision A2
EDGE DETECT CONTROL REGISTER
Bit: 7 6 5 4 3 2 1 0
EDFILT.1 EDFILT.0 ED2TRG ED2EN ED1TRG ED1EN ED0TRG ED0EN
Mnemonic: EDIC Address: A3h
BIT NAME FUNCTION
7-6
Edge detect filter type bits:
00 – Filter clock = Fosc.
01 – Filter clock = Fosc/2.
10 – Filter clock = Fosc/4.
11 – Filter clock = Fosc/8.
5 ED2TRG
Edge detect 2 (ED2) trigger type bit:
0 – Falling edge on ED2 pin will cause EDF to be set (if ED2EN is enabled).
1 – Either falling or rising edge on ED2 pin will cause EDF to be set (if ED2EN is
enabled).
4 ED2EN
Edge detect 2 (ED2) enable bit:
0 – Disabled.
1 – Enable ED2 (P1.2 pin) as a cause of an edge detect interrupt.
3 ED1TRG
Edge detect 1 (ED1) trigger type bit:
0 – Falling edge on ED1 pin will cause EDF to be set (if ED1EN is enabled).
1 – Either falling or rising edge on ED1 pin will cause EDF to be set (if ED1EN is
enabled).
2 ED1EN
Edge detect 1 (ED1) enable bit:
0 – Disabled.
1 – Enable ED1 (P1.1 pin) as a cause of an edge detect interrupt.
1 ED0TRG
Edge detect 0 (ED0) trigger type bit:
0 – Falling edge on ED0 pin will cause EDF to be set (if ED0EN is enabled).
1 – Either falling or rising edge on ED0 pin will cause EDF to be set (if ED0EN is
enabled).
0 ED0EN
Edge detect 0 (ED0) enable bit:
0 – Disabled.
1 – Enable ED0 (P1.0 pin) as a cause of an edge detect interrupt.
INTERRUPT ENABLE
Bit: 7 6 5 4 3 2 1 0
EA EADC EBO - ET1 EX1 ET0 EX0
Mnemonic: IE Address: A8h