Rainbow Electronics DS3131 - Manual (Page 143)

DS3131
143 of 174
Bridge Mode Interrupt
In the PCI bridge mode, the local bus can detect an external interrupt through the LINT signal. If the
local bus detects that the LINTA signal has been asserted, it then sets the LBINT status bit in the status
master (SM) register. Setting this status bit can cause a hardware interrupt to occur at the PCI bus
through the PINTA signal. This interrupt can be masked through the ISM register. See Section
5 for more
details.
11.1.2 Configuration Mode
In configuration mode, the local bus is used only to configure the device and obtain status information
from the device. It is also used to configure the PCI configuration registers and therefore the PCI bus
signal PIDSEL is disabled when the local bus is in the configuration mode. Data cannot be passed from
the local bus to the PCI bus in this mode. The PCI bus is only used as a high-speed I/O bus for the
HDLC packet data. In this mode, bus arbitration, bus format, and the user-settable bus transaction time
features are disabled. All bus accesses are based on 16-bit addresses and 16-bit data in this mode. The
upper four addresses (LA[19:16]) are ignored and 8-bit data accesses are not allowed. See Section
13 for
the AC timing requirements.