Rainbow Electronics AT89C2051 - Manual (Page 4)

Microcontroller
5-50
The bulk of the virtual instruction set is presented in Table
3. These instructions include memory access instructions,
arithmetic instruction, and logical instructions. In keeping
with the previously established proposition, most can return
either bytes or words.
Since the compare instructions are designed to only deter-
mine equality, the instruction set is augmented by a set of
special compare modifiers. Using these, nuances of rela-
tive (signed and unsigned) magnitude can be coerced from
the basic compare instructions. These modifiers are
described in Table 4.
Program branching is supported using the relatively con-
ventional set of conditional and unconditional jump instruc-
tions shown in Table 5. Versions are provided for both near
and far destination targets to enhance code efficiency.
Note the inclusion of the SWITCH instruction which proves
especially useful since the “normal” compare instructions
destroy the contents of the accumulator when returning the
result of the compare operation.
Table 6 presents the stack manipulation set. Included are
common functions such as CALL, RETurn, and PUSH.
Conspicuously absent is an explicit POP instruction. The
corresponding functionality is provided by the various
addressing modes that, by default, manipulate the top of
the stack. For instance, POP A is synonymous with LD S+.
Additional instructions are included to facilitate stack frame
creation and destruction that is a necessary function of the
C language implementation.
Finally, the virtual instruction set is rounded with a number
of miscellaneous instructions shown in Table 7. For the
most part, these perform standard functions that should be
self explanatory. The input/output instructions are special in
that they offer an implementation specific avenue for estab-
lishing certain peripheral functions as instructions. Remem-
ber that, even though, the virtual instruction set offers the
programmer total freedom to construct any kind of compu-
tational sequence, all I/O operations are dependent on the
support coded into the Virtual Machine kernel. Essentially,
the simulation kernel is the software embodiment of a
microprocessor architecture. Naturally, the goal is to pro-
vide a general purpose engine capable of serving in a wide
variety of real embedded systems.
A significant number of op codes remain unassigned and
are available for future use.
Initial Program Loader
While not actually part of the Virtual Machine, the simula-
tion kernel contains a built-in program loader utility. This
operates serially and is invoked following a system reset by
a sequence of special commands from a utility program
running on the host computer. In addition to transferring the
load image to the Virtual Processor, the PC program pro-
vides a number of features which include a simulator (that
can hook into the target’s logical and physical I/O sub-
system) and a console window for performing user I/O to
the target system. Since the Virtual Machine’s code gener-
ator emits a standard Intel HEX file format, the use of the
PC utility program is optional.
In principle, there is no reason why an AT24C64 cannot be
programmed externally using a standard device program-
mer just as you would program an EPROM for a use in a
typical embedded computer. Although workable, this
approach would, at the least, prove cumbersome through-
out the development cycle. The difficulty of this approach
would be exacerbated in a system using multiple memory
chips. Obviously, it would be completely unworkable in the
event a Virtual Machine computer was rendered as a sur-
face mount assembly.