Timer/counter0 control register – tccr0, Attiny11/12 – Rainbow Electronics ATtiny12 User Manual

Page 32

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32

ATtiny11/12

1006C–09/01

Figure 24. Timer/Counter0 Block Diagram

Timer/Counter0 Control
Register – TCCR0

• Bits 7..3 - Res: Reserved Bits

These bits are reserved bits in the ATtiny11/12 and always read as zero.

• Bits 2,1,0 - CS02, CS01, CS00: Clock Select0, Bit 2,1 and 0

The Clock Select0 bits 2,1 and 0 define the prescaling source of Timer0.

T0

Bit

7

6

5

4

3

2

1

0

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-

-

-

-

-

CS02

CS01

CS00

TCCR0

Read/Write

R

R

R

R

R

R/W

R/W

R/W

Initial Value

0

0

0

0

0

0

0

0

Table 15. Clock 0 Prescale Select

CS02

CS01

CS00

Description

0

0

0

Stop, the Timer/Counter0 is stopped.

0

0

1

CK

0

1

0

CK/8

0

1

1

CK/64

1

0

0

CK/256

1

0

1

CK/1024

1

1

0

External Pin T0, falling edge

1

1

1

External Pin T0, rising edge

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