Rainbow Electronics DS1874 - Manual (Page 14)

DS1874
SFP+ Controller with Digital LDD Interface
14 ______________________________________________________________________________________
BIAS and MODULATION Control
During Power-Up
The DS1874 has two internal registers, MODULATION
and BIAS, that represent the values written to the
MAX3798/MAX3799’s modulation DAC and bias DAC
through the 3-wire interface. On power-up, the DS1874
sets the MODULATION and BIAS registers to 0. When
V
CC is above POA, the DS1874 initializes the MAX3798/
MAX3799. After a temperature conversion is completed
and if the VCC LO alarm is enabled, an additional V
CC
conversion above the customer-defined VCC LO alarm
level is required before the MAX3798/MAX3799 MODU-
LATION register is updated with the value determined
by the temperature conversion and the modulation LUT.
When the MODULATION register is set, the BIAS regis-
ter is set to a value equal to ISTEP (see Figure 2). The
startup algorithm checks if this bias current causes a
feedback voltage above the APC set point, and if not, it
continues increasing the BIAS register by ISTEP until the
APC set point is exceeded. When the APC set point is
exceeded, the device begins a binary search to quickly
reach the bias current corresponding to the proper
power level. After the binary search is completed, the
APC integrator is enabled and single LSB steps are
used to tightly control the average power.
The TXP HI, TXP LO, HBAL, and BIAS MAX QT alarms
are masked until the binary search is completed.
However, the BIAS MAX alarm is monitored during this
time to prevent the BIAS register from exceeding
IBIASMAX. During the bias current initialization, the
BIAS register is not allowed to exceed IBIASMAX. If this
occurs during the ISTEP sequence, then the binary
search routine is enabled. If IBIASMAX is exceeded
during the binary search, the next smaller step is acti-
vated. ISTEP or binary increments that would cause the
BIAS register to exceed IBIASMAX are not taken.
Masking the alarms until the completion of the binary
search prevents false positive alarms during startup.
ISTEP is programmed by the customer using Table
02h, Register BBh. During the first steps, the MAX3798/
MAX3799’s bias DAC is directly written using
SET_IBIAS (3-wire address 09h). ISTEP should be pro-
grammed to the maximum safe increase that is allow-
able during startup. If this value is programmed too
low, the DS1874 still operates, but it could take signifi-
cantly longer for the algorithm to converge and hence
to control the average power.
If a fault is detected, and TXD is toggled to reenable
the outputs, the DS1874 powers up following a similar
sequence to an initial power-up. The only difference is
that the DS1874 already has determined the present
temperature, so the t
INIT time is not required for the
DS1874 to recall the APC and MOD set points from
EEPROM.
1 2 3 4 5 6 7 8 9 10 11 12 13
V POA
MODULATION REGISTER
BIAS REGISTER
V
CC
BIAS SAMPLE
t INIT
t
SEARCH
BINARY SEARCH
APC INTEGRATOR ON
4x ISTEP
3x ISTEP
2x ISTEP
ISTEP
Figure 2. Power-Up Timing