Rainbow Electronics AT25256A - Manual (Page 9)

9
AT25128A/256A [Preliminary]
3404A–SEEPR–10/03
The AT25128A/256A is capable of a 64-byte PAGE WRITE operation. After each byte of
data is received, the six low order address bits are internally incremented by one; the
high order bits of the address will remain constant. If more than 64 bytes of data are
transmitted, the address counter will roll over and the previously written data will be
overwritten. The AT25128A/256A is automatically returned to the write disable state at
the completion of a WRITE cycle.
NOTE: If the device is not Write enabled (WREN), the device will ignore the Write
instruction and will return to the standby state, when CS is brought high. A new CS fall-
ing edge is required to re-initiate the serial communication.
Table 6. Address Key
Address AT25128A AT25256A
A
N
A
13
- A
0
A
14
- A
0
Don’t Care Bits A
15 -
A
14
A
15