Rainbow Electronics DS1315 - Manual (Page 6)

DS1315
041697 6/22
ROM/TIME CHIP INTERFACE Figure 4
ROM
A1, A3 – AN
DATA I/O
A2
OE
A0
DS1315
D
OE
WE
CEI
RST
BAT 1
X 1
BAT 2
X 2
CEO
Q
V CCI
V CCO
ROM/
RAM
+ +
BAT 1 BAT 2
32.768 KHz
A0 – AN
D0 – D7
CE
RST
CE
V CC
OE
V CC
V CC
TIME CHIP REGISTER INFORMATION
Time Chip information is contained in eight registers of
8 bits, each of which is sequentially accessed one bit at
a time after the 64–bit pattern recognition sequence has
been completed. When updating the Time Chip regis-
ters, each must be handled in groups of 8 bits. Writing
and reading individual bits within a register could pro-
duce erroneous results. These read/write registers are
defined in Figure 5.
Data contained in the Time Chip registers is in binary
coded decimal format (BCD). Reading and writing the
registers is always accomplished by stepping though all
eight registers, starting with bit 0 of register 0 and ending
with bit 7 of register 7.
AM–PM/12/24 MODE
Bit 7 of the hours register is defined as the 12– or
24–hour mode select bit. When high, the 12–hour mode
is selected. In the 12–hour mode, bit 5 is the AM/PM bit
with logic high being PM. In the 24–hour mode, bit 5 is
the second 10–hour bit (20–23 hours).
OSCILLATOR AND RESET BITS
Bits 4 and 5 of the day register are used to control the
reset and oscillator functions. Bit 4 controls the reset pin
input. When the reset bit is set to logic 1, the reset input
pin is ignored. When the reset bit is set to logic 0, a low
input on the reset pin will cause the Time Chip to abort
data transfer without changing data in the timekeeping
registers. Reset operates independently of all other in-
puts. Bit 5 controls the oscillator. When set to logic 0, the
oscillator turns on and the real time clock/calendar
begins to increment.
ZERO BITS
Registers 1, 2, 3, 4, 5, and 6 contain one or more bits that
will always read logic 0. When writing these locations,
either a logic 1 or 0 is acceptable.