Rainbow Electronics AT75C310 User Manual
Smart internet appliance processor (siap, Features, Description
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Table of contents
Document Outline
- Features
- Description
- AT75C310 Pin Configuration
- AT75C310 Pin Description
- Block Diagram
- Architectural Overview
- PDC: Peripheral Data Controller
- Memory Map
- Peripheral Memory Map
- Initialization
- Boot Mode
- AT75C310 Mode Controller
- EBI: External Bus Interface
- SMC: Static Memory Controller
- External Memory Mapping
- Signal Interface
- Data Bus Width
- Byte-write or Byte-select Mode
- Read Protocols
- Write Protocol
- Wait States
- LCD Interface Mode
- SMC Register Map
- Switching Waveforms
- DMC: Dynamic Memory Controller
- DMC Operation
- Initialization Sequence
- Data Alignment
- DRAM Interface
- Write Access Followed by Burst Read Access
- Read and Write Accesses Followed by CAS before RAS Refresh
- AIC: Advanced Interrupt Controller
- PIO: Parallel I/O Controller
- USART: Universal Synchronous/Asynchronous Receiver/Transmitter
- Pin Description
- Baud Rate Generator
- Receiver
- Asynchronous Receiver
- Synchronous Receiver
- Receiver Ready
- Parity Error
- Framing Error
- Time-out
- Transmitter
- Time-guard
- Multi-drop Mode
- Break
- Transmit Break
- Receive Break
- Peripheral Data Controller
- Interrupt Generation
- Channel Modes
- Modem Control and Status Signals
- NCTS: Clear to Send
- NDCD: Data Carrier Detect
- NDSR: Data Set Ready
- NDTR: Data Terminal Ready
- NRI: Ring Indicator
- NRTS: Request to Send
- TC: Timer/Counter
- Signal Name Description
- Timer/Counter Description
- Counter
- Clock Selection
- Clock Control
- Timer/Counter Operating Modes
- Trigger
- Capture Mode
- Capture Registers A and B (RA and RB)
- Trigger Conditions
- Status Register
- Waveform Mode
- Compare Register A, B and C (RA, RB, and RC)
- Output Controller
- Status
- TC User Interface
- SPI: Serial Peripheral Interface
- WD: Watchdog Timer
- Dual-port Mailbox
- Assembly Source Code – Boot Program