Rainbow Electronics AT25DQ161 - Manual (Page 5)

5 AT25DQ161 [DATASHEET]
8671C–DFLASH–11/2012
3. Block Diagram
Figure 3-1. Block Diagram
Flash
Memory
Array
Y-Gating
CS
SCK
Note: I/O
3-0
pin naming convention is used for Dual-I/O and Quad-I/O commands
SO (I/O
1
)
SI (I/O
0
)
Y-Decoder
Address Latch
X-Decoder
I/O Buffers
and Latches
Control and
Protection Logic
SRAM
Data Buffer
WP (I/O
2
)
Interface
Control
and
Logic
HOLD (I/O
3
)